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参数资料
| 型号： | UPD70F3261YGF-JBT-A |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, PLASTIC, QFP-100 |
| 文件页数： | 83/129页 |
| 文件大小： | 8549K |
| 代理商： | UPD70F3261YGF-JBT-A |
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CHAPTER 3 CPU FUNCTION
User’s Manual U16541EJ5V1UD
57
3.2.1
Program register set
The program registers include general-purpose registers and a program counter.
(1) General-purpose registers (r0 to r31)
Thirty-two general-purpose registers, r0 to r31, are available. Any of these registers can be used to store a
data variable or an address variable.
However, r0 and r30 are implicitly used by instructions and care must be exercised when these registers are
used. r0 always holds 0 and is used for an operation that uses 0 or addressing of offset 0. r30 is used by the
SLD and SST instructions as a base pointer when these instructions access the memory. r1, r3 to r5, and r31
are implicitly used by the assembler and C compiler. When using these registers, save their contents for
protection, and then restore the contents after using the registers. r2 is sometimes used by the real-time OS.
If the real-time OS does not use r2, it can be used as a register for variables.
Table 3-1. Program Registers
Name
Usage
Operation
r0
Zero register
Always holds 0.
r1
Assembler-reserved register
Used as working register to create 32-bit immediate data
r2
Register for address/data variable (if real-time OS does not use r2)
r3
Stack pointer
Used to create a stack frame when a function is called
r4
Global pointer
Used to access a global variable in the data area
r5
Text pointer
Used as register that indicates the beginning of a text area (area
where program codes are located)
r6 to r29
Register for address/data variable
r30
Element pointer
Used as base pointer to access memory
r31
Link pointer
Used when the compiler calls a function
PC
Program counter
Holds the instruction address during program execution
Remark
For further details on the r1, r3 to r5, and r31 that are used in the assembler and C compiler, refer to
the CA850 (C Compiler Package) Assembly Language User’s Manual.
(2) Program counter (PC)
The program counter holds the instruction address during program execution. The lower 32 bits of this register
are valid. Bits 31 to 26 are fixed to 0. A carry from bit 25 to 26 is ignored even if it occurs.
Bit 0 is fixed to 0. This means that execution cannot branch to an odd address.
31
26 25
1 0
PC
Fixed to 0
Instruction address during program execution
0
Default value
00000000H
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| UPD70F3263GC-8EA-A | 制造商:Renesas Electronics Corporation 功能描述: |
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