参数资料
型号: UPD70F3261YGF-JBT-A
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 20 MM, PLASTIC, QFP-100
文件页数: 37/129页
文件大小: 8549K
代理商: UPD70F3261YGF-JBT-A
User’s Manual U16541EJ5V1UD
15
18.1.1
Communication protocol of IEBus ........................................................................................... 675
18.1.2
Determination of bus mastership (arbitration).......................................................................... 676
18.1.3
Communication mode.............................................................................................................. 676
18.1.4
Communication address .......................................................................................................... 676
18.1.5
Broadcast communication ....................................................................................................... 677
18.1.6
Transfer format of IEBus ......................................................................................................... 677
18.1.7
Transfer data ........................................................................................................................... 687
18.1.8
Bit format ................................................................................................................................. 689
18.2
Configuration .........................................................................................................................690
18.3
Registers ................................................................................................................................692
18.4
Interrupt Operations of IEBus Controller............................................................................722
18.4.1
Interrupt control block .............................................................................................................. 722
18.4.2
Example of identifying interrupt ............................................................................................... 725
18.4.3
Interrupt source list .................................................................................................................. 728
18.4.4
Communication error source processing list............................................................................ 729
18.5
Interrupt Request Signal Generation Timing and Main CPU Processing........................731
18.5.1
Master transmission ................................................................................................................ 731
18.5.2
Master reception...................................................................................................................... 733
18.5.3
Slave transmission .................................................................................................................. 735
18.5.4
Slave reception........................................................................................................................ 737
18.5.5
Interval of occurrence of interrupt request signal for IEBus control ......................................... 739
CHAPTER 19 CAN CONTROLLER ......................................................................................................743
19.1
Overview.................................................................................................................................743
19.1.1
Features .................................................................................................................................. 743
19.1.2
Overview of functions .............................................................................................................. 744
19.1.3
Configuration ........................................................................................................................... 745
19.2
CAN Protocol .........................................................................................................................746
19.2.1
Frame format ........................................................................................................................... 746
19.2.2
Frame types ............................................................................................................................ 747
19.2.3
Data frame and remote frame.................................................................................................. 747
19.2.4
Error frame .............................................................................................................................. 754
19.2.5
Overload frame........................................................................................................................ 755
19.3
Functions ...............................................................................................................................756
19.3.1
Determining bus priority........................................................................................................... 756
19.3.2
Bit stuffing................................................................................................................................ 756
19.3.3
Multi masters ........................................................................................................................... 756
19.3.4
Multi cast ................................................................................................................................. 756
19.3.5
CAN sleep mode/CAN stop mode function.............................................................................. 757
19.3.6
Error control function ............................................................................................................... 757
19.3.7
Baud rate control function........................................................................................................ 762
19.4
Connection with Target System ..........................................................................................766
19.5
Internal Registers of CAN Controller ..................................................................................767
19.5.1
CAN controller configuration.................................................................................................... 767
19.5.2
Register access type ............................................................................................................... 768
19.5.3
Register bit configuration ......................................................................................................... 785
19.6
Registers ................................................................................................................................789
19.7
Bit Set/Clear Function...........................................................................................................824
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