
User’s Manual U16541EJ5V1UD
17
20.12 Operation Timing...................................................................................................................903
20.13 Cautions .................................................................................................................................908
CHAPTER 21 CRC FUNCTION ............................................................................................................912
21.1
Functions ...............................................................................................................................912
21.2
Configuration .........................................................................................................................912
21.3
Registers ................................................................................................................................913
21.4
Operation................................................................................................................................914
21.5
Usage......................................................................................................................................915
CHAPTER 22 INTERRUPT/EXCEPTION PROCESSING FUNCTION ...............................................917
22.1
Features..................................................................................................................................917
22.2
Non-Maskable Interrupts ......................................................................................................921
22.2.1
Operation................................................................................................................................. 923
22.2.2
Restore.................................................................................................................................... 924
22.2.3
NP flag..................................................................................................................................... 925
22.3
Maskable Interrupts ..............................................................................................................926
22.3.1
Operation................................................................................................................................. 926
22.3.2
Restore.................................................................................................................................... 928
22.3.3
Priorities of maskable interrupts .............................................................................................. 929
22.3.4
Interrupt control register (xxICn) .............................................................................................. 933
22.3.5
Interrupt mask registers 0 to 3 (IMR0 to IMR3)........................................................................ 936
22.3.6
In-service priority register (ISPR)............................................................................................. 938
22.3.7
ID flag ...................................................................................................................................... 939
22.3.8
Watchdog timer mode register 2 (WDTM2) ............................................................................. 939
22.4
Software Exception ...............................................................................................................940
22.4.1
Operation................................................................................................................................. 940
22.4.2
Restore.................................................................................................................................... 941
22.4.3
EP flag..................................................................................................................................... 942
22.5
Exception Trap ......................................................................................................................943
22.5.1
Illegal opcode definition ........................................................................................................... 943
22.5.2
Debug trap............................................................................................................................... 945
22.6
External Interrupt Request Input Pins (NMI and INTP0 to INTP7) ....................................947
22.6.1
Noise elimination ..................................................................................................................... 947
22.6.2
Edge detection......................................................................................................................... 947
22.7
Interrupt Acknowledge Time of CPU...................................................................................952
22.8
Periods in Which Interrupts Are Not Acknowledged by CPU...........................................955
22.9
Cautions .................................................................................................................................955
CHAPTER 23 KEY INTERRUPT FUNCTION ......................................................................................956
23.1
Function .................................................................................................................................956
23.2
Register ..................................................................................................................................957
23.3
Cautions .................................................................................................................................957
CHAPTER 24 STANDBY FUNCTION...................................................................................................958
24.1
Overview.................................................................................................................................958