参数资料
型号: UPD70F3261YGF-JBT-A
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 20 MM, PLASTIC, QFP-100
文件页数: 128/129页
文件大小: 8549K
代理商: UPD70F3261YGF-JBT-A
User’s Manual U16541EJ5V1UD
98
CHAPTER 4 PORT FUNCTIONS
4.1
Features
I/O ports: 84
5 V tolerant/N-ch open-drain output selectable: 40 (ports 0, 3 to 5, 9)
Input/output specifiable in 1-bit units
4.2
Basic Port Configuration
The V850ES/SG2 and V850ES/SG2-H feature a total of 84 I/O ports consisting of ports 0, 1, 3 to 5, 7, 9, CM, CT,
DH, and DL. The port configuration is shown below.
Figure 4-1. Port Configuration Diagram
P02
P06
Port 0
PCM0
PCM3
Port CM
P90
P915
Port 9
PCT0
PCT1
PCT4
PCT6
Port CT
PDH0
PDH5
Port DH
PDL0
PDL15
Port DL
P30
P39
Port 3
Port 1
P40
P42
Port 4
P50
P55
Port 5
P70
P711
Port 7
P10
P11
Caution
Ports 0, 3 to 5, and 9 are 5 V tolerant.
Table 4-1. I/O Buffer Power Supplies for Pins
Power Supply
Corresponding Pins
AVREF0
Port 7
AVREF1
Port 1
BVDD
Ports CM, CT, DH (bits 0 to 3), DL
EVDD
RESET, ports 0, 3 to 5, 9, DH (bits 4, 5)
<R>
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