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| 型号： | UPD70F3261YGF-JBT-A |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, PLASTIC, QFP-100 |
| 文件页数： | 40/129页 |
| 文件大小： | 8549K |
| 代理商： | UPD70F3261YGF-JBT-A |
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User’s Manual U16541EJ5V1UD
18
24.2
Registers ............................................................................................................................... 960
24.3
HALT Mode............................................................................................................................ 963
24.3.1
Setting and operation status ....................................................................................................963
24.3.2
Releasing HALT mode.............................................................................................................963
24.4
IDLE1 Mode ........................................................................................................................... 965
24.4.1
Setting and operation status ....................................................................................................965
24.4.2
Releasing IDLE1 mode ............................................................................................................966
24.5
IDLE2 Mode ........................................................................................................................... 968
24.5.1
Setting and operation status ....................................................................................................968
24.5.2
Releasing IDLE2 mode ............................................................................................................968
24.5.3
Securing setup time when releasing IDLE2 mode ................................................................... 970
24.6
STOP Mode............................................................................................................................ 971
24.6.1
Setting and operation status ....................................................................................................971
24.6.2
Releasing STOP mode ............................................................................................................971
24.6.3
Securing oscillation stabilization time when releasing STOP mode .........................................974
24.7
Subclock Operation Mode ................................................................................................... 975
24.7.1
Setting and operation status ....................................................................................................975
24.7.2
Releasing subclock operation mode ........................................................................................975
24.8
Sub-IDLE Mode ..................................................................................................................... 977
24.8.1
Setting and operation status ....................................................................................................977
24.8.2
Releasing sub-IDLE mode .......................................................................................................978
CHAPTER 25 RESET FUNCTIONS ..................................................................................................... 980
25.1
Overview................................................................................................................................ 980
25.2
Registers to Check Reset Source....................................................................................... 982
25.3
Operation............................................................................................................................... 983
25.3.1
Reset operation via RESET pin ...............................................................................................983
25.3.2
Reset operation by watchdog timer 2 (WDT2RES)..................................................................985
25.3.3
Reset operation by low-voltage detector (LVIRES) (V850ES/SG2 only)..................................987
25.3.4
Reset operation by clock monitor (CLMRES) ..........................................................................988
25.3.5
Operation after reset release ...................................................................................................990
25.3.6
Reset function operation flow...................................................................................................992
25.4
Valid/Invalid of Internal RAM Data ...................................................................................... 993
CHAPTER 26 CLOCK MONITOR ........................................................................................................ 994
26.1
Functions............................................................................................................................... 994
26.2
Configuration ........................................................................................................................ 994
26.3
Register ................................................................................................................................. 995
26.4
Operation............................................................................................................................... 996
CHAPTER 27 LOW-VOLTAGE DETECTOR ....................................................................................... 999
27.1
Functions............................................................................................................................... 999
27.2
Configuration ........................................................................................................................ 999
27.3
Registers ............................................................................................................................. 1000
27.4
Operation............................................................................................................................. 1002
27.4.1
To use for internal reset signal (LVIRES) 19-21 .................................................................... 1002
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