参数资料
型号: UPD70F3261YGF-JBT-A
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 20 MM, PLASTIC, QFP-100
文件页数: 92/129页
文件大小: 8549K
代理商: UPD70F3261YGF-JBT-A
CHAPTER 3 CPU FUNCTION
User’s Manual U16541EJ5V1UD
65
3.4
Address Space
3.4.1
CPU address space
For instruction addressing, up to a combined total of 16 MB of external memory area and internal ROM area, plus
an internal RAM area, are supported in a linear address space (program space) of up to 64 MB. For operand
addressing (data access), up to 4 GB of a linear address space (data space) is supported. The 4 GB address space,
however, is viewed as 64 images of a 64 MB physical address space. This means that the same 64 MB physical
address space is accessed regardless of the value of bits 31 to 26.
Figure 3-1. Image on Address Space
Program space
Internal RAM area
Use-prohibited area
External memory area
Internal ROM area
(external memory area)
Data space
Image 63
Image 1
Image 0
Peripheral I/O area
Internal RAM area
Programmable peripheral
I/O area or
use-prohibited area
External memory area
Internal ROM area
(external memory area)
16 MB
4 GB
64 MB
Caution
Only the programmable peripheral I/O area is seen as images of 256 MB each in the 4 GB
address space.
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