参数资料
型号: A42MX24-3VQ100B
厂商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件页数: 15/93页
文件大小: 854K
代理商: A42MX24-3VQ100B
22
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
Push Block
Status Word
PBS
0011
Not Used
(Don't Care)
Conditional
Push the Block Status Word for the most recent message on
the General Purpose Queue if the condition flag tests TRUE,
otherwise continue execution at the next OpCode in the
instruction list.
TABLE 36. BC OPERATIONS FOR MESSAGE SEQUENCE CONTROL (CONT.)
INSTRUCTION
MNEMONIC
OP CODE
(HEX)
PARAMETER
DESCRIPTION
Load Time Tag
Counter
LTT
000D
Time Value.
Resolution
(s/LSB) is
defined by bits 9,
8, and 7 of
Configuration
Register #2.
Conditional
Load Time Tag Counter with Time Value if the condition flag
tests TRUE, otherwise continue execution at the next
OpCode in the instruction list.
Load Frame
Timer
LFT
000E
Time Value
(resolution =
100 s/LSB)
Conditional
Load Frame Timer Register with the Time Value parameter
if the condition flag tests TRUE, otherwise continue execu-
tion at the next OpCode in the instruction list.
Start Frame
Timer
SFT
000F
Not Used
(Don't Care)
Conditional
Start Frame Time Counter with Time Value in Time Frame
register if the condition flag tests TRUE, otherwise continue
execution at the next OpCode in the instruction list.
Push Time Tag
Register
PTT
0010
Not Used
(Don't Care)
Conditional
Push the value of the Time Tag Register on the General
Purpose Queue if the condition flag tests TRUE, otherwise
continue execution at the next OpCode in the instruction list.
Push Immediate
Value
PSI
0012
Immediate Value
Conditional
Push Immediate data on the General Purpose Queue if the
condition flag tests TRUE, otherwise continue execution at
the next OpCode in the instruction list.
Push Indirect
PSM
0013
Memory
Address
Conditional
Push the data stored at the specified memory location on
the General Purpose Queue if the condition flag tests TRUE,
otherwise continue execution at the next OpCode in the
instruction list.
Wait for
External
Trigger
WTG
0014
Not Used
(Don't Care)
Conditional
Wait for a logic "0"-to-logic "1" transition on the EXT_TRIG
input signal before proceeding to the next OpCode in the
instruction list if the condition flag tests TRUE, otherwise
continue execution at the next OpCode without delay.
Execute and
Flip
XQF
0015
Message
Control /
Status Block
Address
Unconditional
Execute (unconditionally) the message referenced by the
Message Control/Status Block Address. Following the pro-
cessing of this message, if the condition flag tests TRUE,
the BC will toggle bit 4 in the Message Control/Status Block
Address, and store the new Message Block Address as the
updated value of the parameter following the XQF instruc-
tion code. As a result, the next time that this line in the
instruction list is executed, the Message Control/Status
Block at the updated address (old address XOR 0010h),
rather than the old address, will be processed. If the condi-
tion flag tests FALSE, the value of the Message
Control/Status Block Address parameter will not change.
CONDITIONAL
OR
UNCONDITIONAL
GP Flag Bits
FLG
000C
Used to set,
clear, or toggle
GP
(General
Purpose)
Flag bits
(See description)
Unconditional
Used to set, toggle, or clear any or all of the eight general
purpose flags. The table below illustrates the use of the GP
Flag Bits instruction for the case of GP0 (General Purpose
Flag 0). Bits 1 and 9 of the parameter byte affect flag GP1,
bits 2 and 10 effect GP2, etc., according to the following
rules:
Bit 8
0
1
0
1
0
1
Bit 0
Effect on GP0
No Change
Set Flag
Clear Flag
Toggle Flag
相关PDF资料
PDF描述
A42MX36-2PQ100B 40MX and 42MX FPGA Families
A42MX36-2PQ100ES 40MX and 42MX FPGA Families
A42MX36-2TQ100 40MX and 42MX FPGA Families
A42MX36-2TQ100A 40MX and 42MX FPGA Families
A42MX36-2TQ100B 40MX and 42MX FPGA Families
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