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参数资料
| 型号： | B900J24PXX12I |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 80 MHz, OTHER DSP, PQFP44 |
| 文件页数： | 34/100页 |
| 文件大小： | 1547K |
| 代理商： | B900J24PXX12I |
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Lucent Technologies Inc.
39
Advance Data Sheet
B900
July 1999
Baseband Signal Processor
5 Software Architecture
5.1
Instruction Set
The B900 processor has seven types of instructions: multiply/ALU, special function, control, F3 ALU, BMU, cache,
and data move. The multiply/ALU instructions are the primary instructions used to implement signal processing
algorithms. Statements from this group can be combined to generate multiply/accumulate, logical, and other ALU
functions, and to transfer data between memory and registers in the data arithmetic unit. The special function
instructions can be conditionally executed based on flags from the previous ALU or BMU operation, the condition of
one of the counters, or the value of a pseudorandom bit in the B900 device. Special function instructions perform
shift, round, and complement functions.
The F3 ALU instructions enrich the operations available on accumulators. The BMU instructions provide high-
performance bit manipulation. The control instructions implement the goto and call commands. Control instruc-
tions can also be executed conditionally. Cache instructions are used to implement low overhead loops, conserve
program memory, and decrease the execution time of certain multiply/ALU instructions. Data move instructions are
used to transfer data between memory and registers or between accumulators and registers.
5.1.1 F1 Multiply/ALU Instructions
Note that the function statements and transfer statements in Table 22 are chosen independently. Any function
statement (F1) can be combined with any transfer statement to form a valid multiply/ALU instruction. If either state-
ment is not required, a single statement from either column constitutes a valid instruction. The number of cycles to
execute the instruction is a function of the transfer column. (An instruction with no transfer statement executes in
one instruction cycle.)
Whenever PC, pt, or rM is used in the instruction and points to external memory, the programmed number of wait-
states must be added to the instruction cycle count. All multiply/ALU instructions require one word of program
memory. The no-operation (nop) instruction is a special case encoding of a multiply/ALU instruction and executes
in one cycle. The assembly-language representation of a nop is either nop or a single semicolon.
Table 21. Instruction Set Operators
Symbol
Meaning
Denotes any of the following:
16-by-16 multiplication for a 32-bit product.
Register-indirect addressing when used as a prefix to an address register.
Direct addressing when used as a prefix to an immediate.
+
36-bit addition*.
* These are 36-bit operations. One operand is 36-bit data in an accumulator; the other operand may be 16, 32, or 36 bits.
–
36-bit subtraction*.
>>
Arithmetic right shift.
<<
Arithmetic left shift.
>>>
Logical right shift.
<<<
Logical left shift.
|
36-bit bitwise OR*.
&
36-bit bitwise AND*.
^
36-bit bitwise EXCLUSIVE OR*.
:
Compound address swapping, accumulator shuffling.
~
One’s complement.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| B-900-M-10 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-10-EG | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20-EG | 制造商:Thomas & Betts 功能描述: |
| B901 | 制造商:EDAL 制造商全称:EDAL 功能描述:Silicon Bridge Rectifier |
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