- 您现在的位置：买卖IC网 > PDF目录166397 > B900J24PXX12I 0-BIT, 80 MHz, OTHER DSP, PQFP44 PDF资料下载
参数资料
| 型号： | B900J24PXX12I |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 80 MHz, OTHER DSP, PQFP44 |
| 文件页数： | 7/100页 |
| 文件大小： | 1547K |
| 代理商： | B900J24PXX12I |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
14
Lucent Technologies Inc.
3 Pin Information (continued)
Table 6. JTAG Test Mode Interface
Table 7. PWR/GND
Pin
Description
TCK
Test Clock. Input. JTAG serial shift clock that clocks data into TDI and out of TDO and controls
the JTAG port by latching TMS into the state machine controller.
TMS
Test Mode Select. Input. JTAG mode control signal that controls the state of the JTAG
controller. TMS is sampled on the rising edge of TCK. This pin has an internal pull-up resistor
that is typically 68 k
.
TDI
Test Data Input. Input. JTAG serial input of all serial-scanned data and instructions that is
sampled on the rising edge of TCK. This pin has an internal pull-up resistor that is typically
68 k
.
TDO
Test Data Output. 3-state Output. JTAG serial output of all serial-scanned data and status bits.
TDO changes on the falling edge of TCK.
JTSEL
JTAG Select. Input. JTSEL is multiplexed with IOPB3. This pin is sampled on the rising edge of
RSTB. If sampled high, the four multiplexed JTAG pins will be active in place of IOPC[3:0]. If
sampled low, the IOPC[3:0] pins will behave as normal IOP signals.
Pin
Description
VDDA
5.0 V or 3.3 V PLL Supply. VDDA is the positive supply for the analog blocks. Separate bypass
capacitors should be connected from VDDA to VSSA.
VSSA
PLL Ground. VSSA is the ground return for the analog blocks.
VSS
Ground. The B900 has five ground pins.
VDD
5.0 V or 3.3 V Supply. VDD is the positive supply for the digital blocks. There are five power
pins.
相关PDF资料 |
PDF描述 |
|---|---|
| B900J24FXX12IT | 0-BIT, 59.88 MHz, OTHER DSP, PQFP44 |
| BA00CC0WCP-V5 | 1A Low Dropout Voltage Regulator with Shut Down Switch(Adustable Voltage) |
| BA10E6 | COPPER ALLOY, TIN FINISH, RING TERMINAL |
| BA12004 | 0.5 A, 7 CHANNEL, NPN, Si, POWER TRANSISTOR |
| BA1518SUR5VP | SINGLE COLOR DISPLAY CLUSTER, ULTRA RED |
相关代理商/技术参数 |
参数描述 |
|---|---|
| B-900-M-10 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-10-EG | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20-EG | 制造商:Thomas & Betts 功能描述: |
| B901 | 制造商:EDAL 制造商全称:EDAL 功能描述:Silicon Bridge Rectifier |
发布紧急采购，3分钟左右您将得到回复。