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参数资料
| 型号： | B900J24PXX12I |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 80 MHz, OTHER DSP, PQFP44 |
| 文件页数： | 66/100页 |
| 文件大小： | 1547K |
| 代理商： | B900J24PXX12I |
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68
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
5 Software Architecture (continued)
5.4
Instruction Set Formats (continued)
5.4.6 Field Descriptions (continued)
I Field: Specifies a register for short immediate data
move instructions.
JA Field: 12-bit jump address.
K Field: Number of times the NI instructions in cache
are to be executed. Zero specifies use of value in
cloop register.
NI Field: Number of instructions to be loaded into the
cache. Zero implies redo operation.
R Field: Specifies the register for data move
instructions.
Table 79. BMU Encodings
F4
AR
Operation
0000
00xx
aD = aS >> arM
0001
00xx
aD = aS << arM
0000
10xx
aD = aS >>> arM
0001
10xx
aD = aS <<< arM
1000
0000
aD = aS >> aS
1001
0000
aD = aS << aS
1000
aD = aS >>> aS
1001
1000
aD = aS <<< aS
1100
0000
aD = aS >> IM16
1101
0000
aD = aS << IM16
1100
1000
aD = aS >>> IM16
1101
1000
aD = aS <<< IM16
0000
1100
aD = exp(aS)
0001
11xx
aD = norm(aS, arM)
1110
0000
aD = extracts(aS,
IM16)
0010
00xx
aD = extracts(aS,
arM)
1110
0100
aD = extractz(aS,
IM16)
0010
01xx
aD = extractz(aS,
arM)
1110
1000
aD = insert(aS,
IM16)
1010
10xx
aD = insert(aS, arM)
0111
0000
aD = aS:aa0
0111
0001
aD = aS:aa1
Table 80. I Field
IRegister
00
r0/j
01
r1/k
10
r2/rb
11
r3/re
Table 81. R Field
R
Condition
R
Condition
000000
000001
000010
000011
r0
r1
r2
r3
100000
100001
100010
100011
inc
ins
pllc
clkc
000100
000101
000110
000111
j
k
rb
re
100100
100101
101101
100111
cloop
Reserved
wdogr
001000
001001
001010
001011
pt
pr
pi
i
101000
101001
101010
101011
cbita, iopuca*
sbita
chipo
jtag
* These registers are double-mapped and accessed based on the
value of the WIOPUR bit in the chipc register.
001100
001101
001110
001111
p
pl
sioc
sbitd
101100
101101
101110
101111
sdx
reserved
cbitd, iopucd*
reserved
010000
010001
010010
010011
x
y
yl
auc
110000
110001
110010
110011
a0
a0l
a1
a1l
010100
010101
010110
010111
psw
c0
c1
c2
110100
110101
110110
110111
timerc
timer0
cbitb, iopucb*
sbitb
011000
011001
011010
011011
ar0
ar1
ar2
Reserved
111000
111001
111010
111011
cbitc, iopucc*
sbitc
timer1
ar3
011100
011101
011110
011111
ssid
ssic
chipc
ybase
111100
111101
111110
111111
Reserved
alf
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相关代理商/技术参数 |
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|---|---|
| B-900-M-10 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-10-EG | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20 | 制造商:Thomas & Betts 功能描述: |
| B-900-M-20-EG | 制造商:Thomas & Betts 功能描述: |
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