参数资料
型号: GT-48208
厂商: Galileo Technology Services, LLC
英文描述: Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器)
中文描述: 先进的交换式以太网控制器的10 10/100 BaseX(高级交换式10 10/100 BaseX以太网控制器)
文件页数: 13/135页
文件大小: 1619K
代理商: GT-48208
GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
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Revision 1.2
11
The GT-482xx performs Unicast address aging on its Address Table. This can be done automatically or when trig-
gered by a CPU request. See Section 6.7 "Address Aging" on page 30
1.7
IP Multicast and VLAN Support
When a management CPU is present, the GT-482xx traps IGMP packets over Ethernet/802.3 (on IPv4 and partial
IPv6) and passes these to the CPU. The CPU may then program the port-mask (added to each entry in the
Address Table) and the GT-482xx will lookup the Multicast and the Broadcast entries in the table and forward
them according to the port-mask.
In addition, the CPU can program the port masks for Source Addresses. The GT-482xx forwards the Multicast and
Broadcast packets according to the Source Address port masks only if the Multicast address is not present in the
Address Table.
For Unicast packets, the GT-482xx checks that the source port appeared in the destination address port-mask bit
and forwards the packet only if this bit is set. See also Section 6.4 "Locked Port" on page 27.
When unmanaged, the GT-482xx treats Multicast packets as Broadcast, and passes them to all ports, except for
the source port.
1.8
Priority Queueing
Each port, including the CPU has two transmit queues for high and low priority. The GT-482xx inserts the packet
to the high priority queue if one of the following conditions occur:
Priority bit in the Source Port Control register is set
Priority bit in the Address Table is set for the destination address
Priority bit in the Address Table is set for the source address
The incoming packet contains a 802.1Q tag and the most significant bit of the Quality of Service field in
the tag is set.
The CPU is able to force the priority regardless of the result of the above conditions. This is done by setting the
ForcePri bit in the Port Control register. When ForcePri is set, the priority is defined only by the priority bit in the
Source Port Control register.
In addition to the above conditions, all IGMP, BPDU, EASE sampled packets and New_Address messages are
entered into the CPU high-priority queue. All Unknown (both Unicast and Multicast) and Broadcast packets are
entered into the low-priority CPU queue.
1.9
Network Management Features
The GT-482xx provides comprehensive management capabilities enabling the switch OEM to implement a wide
range of network management features.
For OEMs offering RMON capability, the GT-482xx provides per-port statistic counters to implement the first four
groups of RMON.
The GT-482xx includes a unique packet sampling capability invented by the Hewlett-Packard Company called
HP-EASE (Embedded Advanced Sampling Environment.) Each port has the ability to take “snapshots” of packet
data at programmable intervals. These samples are forwarded to the management CPU for processing. The sam-
ples can be used to implement HP-EASE compatible messages for OpenView environments, or to create custom
management information bases such as statistical RMON. Since packets are sampled using this technology, less
local processing is required over standard RMON implementations. The source addresses of packet errors are
also sent to the CPU allowing the switch OEM to support error counters in RMON host and matrix groups.
The GT-482xx includes hardware assistance for bridge-spanning tree algorithm and full hardware support for
address aging.
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