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| 型号： | GT-48208 |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器) |
| 中文描述： | 先进的交换式以太网控制器的10 10/100 BaseX（高级交换式10 10/100 BaseX以太网控制器） |
| 文件页数： | 76/135页 |
| 文件大小： | 1619K |
| 代理商： | GT-48208 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
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9.
ETHERNET (10MBPS) INTERFACES
The GT-482xx incorporates all the required digital circuitry to interface to 10Base-T and 10Base-FL. One of the 12
ports can work in AUI mode.
9.1
Media Access Control (MAC)
The GT-482xx operates in half-duplex or full-duplex modes. In half-duplex mode, the GT-482xx checks that there
is no competitor for the network bus before transmission. In addition to listening for a clear line before transmitting,
the GT-482xx handles collisions in a pre-determined way. If two nodes attempt to transmit at the same time, the
signals collide and the data on the line is garbled. The GT-482xx listens while it is transmitting, and can detect a
collision. If a collision is detected, the GT-482xx transmits a ‘JAM’ pattern and then delays its re-transmission for a
random time period determined by the backoff algorithm. In full-duplex mode, the GT-482xx transmits uncondi-
tionally.
9.2
Illegal Frames
the GT-482xx discards all illegal frames and increments the appropriate error MIB counters. For example, runts
(less than 64 bytes), oversize (greater than 1536 bytes), and bad FCS (bad checksum.)
9.3
Duplex Mode Selection
Each port can be independently selected to function in half- or full-duplex mode. Following reset the port mode is
set by the state sampled on the TxDE[x] pin. This value can be overridden in each port’s Port Control register.
9.4
Backoff Algorithm Options
The backoff algorithm used by all ports is controlled by the Limit4 pin or bit in the Global Control register. Limit4
controls the number of consecutive packet collisions that occur before the collision counter is reset. As a result of
asserting the pin or bit results, the GT-482xx is more aggressive in acquiring the media following a collision. This
results in improved overall switch throughput (less packet loss) in standardized tests. Limit4 can be toggled during
switch operation.
9.5
Manchester Encoder/Decoder
The Manchester Encoder receives clocked data from the transmit engine and uses an internal 20MHz clock
(80MHz divided by 4) to provide the Manchester-encoded data to the Physical interface. The Manchester Decoder
uses the 80MHz clock to recover the receive clock and to sample the incoming data.
9.6
Link Integrity
The GT-482xx implements the Link Integrity test as specified in the IEEE 802.3 10Base-T and 10Base-FL supple-
ments.
9.7
Data Blinder
The data blinder field (DataBlind in the Serial Parameters register) sets the period of time. The port does not look
at the wire to decide to transmit (inhibit time.) The default value of the Data Blinder is 32uS. The programmed
value in the register is the difference between 96uS and the required Data Blinder length.
9.8
Inter-Packet Gap (IPG)
IPG is the idle time between any two successive packets transmitted from the same port. The default (from the
standard) is 9.6uS for 10Mbps Ethernet and 960nsec for 100-Mbps Fast Ethernet. The IPG can be programmed to
be smaller or larger than the Ethernet standards. Making the IPG smaller can improve test scores at the cost of
Ethernet compatibility (a technique used by many vendors during head-to-head magazine tests). However, this
mode of operation is not recommended due to violation of IEEE standards.
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