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| 型号： | GT-48208 |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高级交换式 10+10/100 BaseX以太网控制器) |
| 中文描述： | 先进的交换式以太网控制器的10 10/100 BaseX（高级交换式10 10/100 BaseX以太网控制器） |
| 文件页数： | 61/135页 |
| 文件大小： | 1619K |
| 代理商： | GT-48208 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
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The default value of the Aging Timer is 30d (0x1E). Therefore, if AClk is 50MHz, the default aging time will be 300
to 600 seconds. If AClk is 66MHz, the default aging time will be 227 to 455 seconds.
The aging time range is determined by a scan mechanism that scrubs the entire table within [(500/AClk freq) * N]
seconds. The Age Scan pointer looks up all entries within this time range. A given entry can be located anywhere
in the Address Table, therefore, the Age Scan pointer will look up the same entry twice in no less than [(500/AClk
Freq) * N] seconds, and no more than [(1000/AClk Freq) * N] seconds.
6.7.2
CPU Trigger Mode
When the CPU Trigger Mode is enabled, the Address Table is scanned once for every trigger. The time for this
scan is [(500/AClk Freq) * N] seconds.
6.8
Static Addresses
The GT-482xx provides support for “Static” MAC addresses. IEEE 802.1d Chapter 3.9.1: "Static entries may be
added to and removed from the filtering database under explicit management control. They are not automatically
removed by any time-out mechanism”. This means that when an address is selected as static, it is not removed
from the Address Table during aging.
During normal address recognition, if an address is static and the port is unlocked, the GT-482xx does not update
its Address Table parameters and does not send a New_Address message to the CPU (if the address has
changed ports). When the port is locked, the GT-482xx sends the New_Address message to the CPU only.
6.9
Address Recognition Failure
An address recognition cycle can fail when more than 8K addresses have been entered into the Address Table. In
the case of an address recognition failure the packet is treated as unknown and forwarded to all ports. An interrupt
is also generated to the CPU (if present).
Address recognition failures are not fatal and do not require handling. Therefore, designers of unmanaged sys-
tems need not be concerned with such a failure. When such a failure occurs in managed systems, the Address
Table may be “cleaned” of old addresses.
6.10
Forwarding Priority
The GT-482xx supports two levels of forwarding priority (high and low) for all 14 transmit ports, and for transmis-
sion to the CPU. Priority is supported by maintaining two packet queues per port.
6.10.1 Priority Assignment
BPDUs, IGMP and sampled HP-EASE packets are enqueued to High priority. New_Address messages to the
CPU are also entered into the High priority queue. Unknown Unicast, Unknown Multicast and Broadcast packets
are enqueued to the CPU’s Low priority queue when their reception to the CPU is enabled.
Known Unicast and known Multicast packets are enqueued according to the priority mode. The packet is entered
to the High priority queue when one of the following conditions are met:
Priority bit in the Source Port Control register is set for the input port
Priority bit in the Address Table is set for the Destination Address
Priority bit in the Address Table is set for the Source Address
The incoming packet contains an 802.1Q tag and the most significant bit of the Quality of service field in
the tag is set (priority is greater or equal to 4).
The CPU can force the priority regardless of the results of the above conditions by setting ForcePri bit in the Port
Control register. When ForcePri is set, the priority is defined only by the priority bit in the Source Port Control reg-
ister.
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