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参数资料
| 型号： | HSP50210JI-52Z |
| 厂商： | Intersil |
| 文件页数： | 36/51页 |
| 文件大小： | 0K |
| 描述： | IC DEMODULATOR COSTAS 84-PLCC |
| 标准包装： | 15 |
| 功能： | 解调器 |
| 频率： | 52MHz |
| RF 型： | AM，FM |
| 封装/外壳： | 84-LCC（J 形引线） |
| 包装： | 管件 |
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HSP50210
TABLE 25. CARRIER LOOP FILTER GAIN (ACQ) CONTROL REGISTER
DESTINATION ADDRESS = 10
BIT
POSITION
31-24
23-18
17-14
13-9
8-5
4-0
FUNCTION
Not Used
Reserved
Carrier Lead Gain
Mantissa (Acquisition)
Carrier Lead Gain
Exponent (Acquisition)
Carrier Lag Gain
Mantissa (Acquisition)
Carrier Lag Gain
DESCRIPTION
No programming required.
Reserved. Set to 0 for proper operation.
These bits are the 4 fractional bits of the lead gain mantissa shown as follows.
Lead Gain Mantissa = 0 1. 2 -1 2 -2 2 -3 2 -4.
This format provides a mantissa range from 1.0 to 1.9375 for mantissa settings from 0000 to 1111 Binary.
Bit position 17 is the MSB.
These bits set the lead gain exponent as given by:
Carrier Lead Gain Exponent = 2 -(32-E).
where E corresponds to the 5-bit binary value programmed here. Thus, a gain range from
2 -1 to 2 -32 (relative to the MSB position of the NCO control word) may be achieved for E = 11111 to 00000
Binary. Bit position 13 is the MSB.
Format same as lead gain mantissa. Bit position 8 is the MSB.
Format same as lead gain exponent. Bit position 4 is the MSB.
Exponent (Acquisition)
TABLE 26. CARRIER LOOP FILTER GAIN (TRK ) CONTROL REGISTER
DESTINATION ADDRESS = 11
BIT
POSITION
31-24
23-18
17-14
13-9
8-5
4-0
FUNCTION
Not Used
Reserved
Carrier Lead Gain
Mantissa (Track)
Carrier Lead Gain
Exponent (Track)
Carrier Lag Gain
Mantissa (Track)
Carrier Lag Gain
DESCRIPTION
No Programming required.
Reserved. Set to 0 for proper operation.
Format same as lead gain mantissa (see Table 25). Bit position 17 is the MSB.
Format same as lead gain exponent (see Table 25). Bit position 13 is the MSB.
Format same as lead gain mantissa (see Table 25). Bit position 8 is the MSB.
Format same as lead gain exponent (see Table 25). Bit position 4 is the MSB.
Exponent (Track)
TABLE 27. FREQUENCY SWEEP/ AFC LOOP CONTROL REGISTER
DESTINATION ADDRESS = 12
BIT
POSITION
31-27
26-23
22-18
17-14
13-9
FUNCTION
Reserved
Sweep Rate Mantissa
(Acquisition)
Sweep Rate Exponent
(Acquisition)
AFC Gain Mantissa
(Acquisition)
AFC Gain Exponent
(Acquisition)
36
DESCRIPTION
Reserved. Set to 0 for proper operation.
Sets carrier track sweep rate used during acquisition (see “Frequency Sweep Block” on page 23). Format
same as lead gain mantissa (see Table 25). Bit position 22 is the MSB.
Sets carrier track sweep rate used during acquisition (see “Frequency Sweep Block” on page 23). Format
same as lead gain exponent (see Table 25). Bit position 22 is the MSB. M = 0000,
E = 00000 is 2 -28 .
Sets Frequency Error Gain. Format same as lead gain mantissa (see Table 25). Bit position 11 is the
MSB.
Sets Frequency Error Gain. Format same as lead gain exponent (see Table 25). Bit position 4 is the MSB.
FN3652.5
July 2, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50214 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214AVC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214AVI | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Programmable Downconverter |
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