参数资料
型号: HSP50210JI-52Z
厂商: Intersil
文件页数: 4/51页
文件大小: 0K
描述: IC DEMODULATOR COSTAS 84-PLCC
标准包装: 15
功能: 解调器
频率: 52MHz
RF 型: AM,FM
封装/外壳: 84-LCC(J 形引线)
包装: 管件
HSP50210
Pin Description
(Continued)
NAME
OEA
OEB
HI/LO
CLK
TYPE
I
I
0
I
DESCRIPTION
A Output Enable. This pin is the three-state control pin for the AOUT9-0. When OEA is high, the AOUT9-0 is high
impedance.
B Output Enable. This pin is the three-state control pin for the BOUT9-BOUT0. When OEB is high, the AOUT9-0 is
high impedance.
HI/LO. The output of the Input Level Detector is provided on this pin (see “Input Level Detector” on page 6). This
signal can be externally averaged and used to control the gain of an amplifier to close an AGC loop around the A/D
converter. This type of AGC sets the level based on the median value on the input.
System Clock. Asynchronous to the processor interface and serial inputs.
4
FN3652.5
July 2, 2008
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