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| 型号： | HSP50214BVCZ |
| 厂商： | Intersil |
| 文件页数： | 28/62页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER 14BIT 120-MQFP |
| 标准包装： | 24 |
| 功能： | 降频器 |
| RF 型： | AMPS，CDMA，GSM，TDMA |
| 封装/外壳： | 120-BQFP |
| 包装： | 托盘 |
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HSP50214B
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
FREQUENCY (RELATIVE TO f S )
FIGURE 24C. POLYPHASE RESAMPLER FILTER EXPANDED
RESOLUTION PASSBAND FREQUENCY
RESPONSE
is limited to 55MHz. Using the symmetric filter pre-sum
approach, PROCCLK limits the programmable FIR to
110MIPS (millions of instructions per second) effective due to
symmetry. If the CDMA filter (loaded into the programmable
FIR Section) requires an impulse response with a span of 12
chips, the filter at 2x the chip-rate would need 24 taps. The 24
taps would translate into 59MIPS = (1.2288MHz)(2)(24). To
get the same filtering at 8x the chip rate would require
944MIPS = (1.2288MHz)(8)(96). Direct 8x filtering can not be
accomplished with the programmable filter alone because
944MIPS are much greater that the 60MIPs effective limit set
by PROCCLK. It is necessary to decimate down to 2x the chip
rate to get a realistic number of filter taps. Both interpolation
halfband filters are then used to obtain the 8x CDMA output.
944MIPS is a lot of MIPS. The HSP50214B gets the
equivalent processing by decimating down and interpolating
backup.
TABLE 10. POLYPHASE AND INTERPOLATING HALFBAND
FILTER MAXIMUM CLOCKING RATES
POLYPHASE
RESAMPLER
FILTER
HALFBAND
FILTER #1
HALFBAND
FILTER #2
RE-SAMPLER
INPUT
INTER-
OUTPUT
CLOCK
RATE
POLATION
RATE
MODE
CYCLES
(MHz)
RATE
(MHz)
RESAMPLER
Bypass
Polyphase Filter
0
6
55.00
55/6 = 9.17
-
-
55.00
9.17
NCO
PULSE
DELAY
Polyphase and
1 Halfband
13
55/13 = 4.23
2
(Note 3)
8.46
(Note 3)
PROCCLK
PROCCLK/N
PULSE DELAY
COUNTER
Filter
Polyphase and
2 Halfband
Filters
1 Halfband
Filter
2 Halfband
Filters
NOTE:
23
7
17
55/23 = 2.39
55/7 = 7.86
55/17 = 3.24
4
2
4
9.56
(Note 3)
15.72
12.94
THIS BLOCK GENERATES EXTRA
DATA READY PULSES FOR THE
NEW OUTPUTS FROM THE
INTERPOLATION PROCESS.
NV = INVALID MODE
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
# EXTRA
PULSES
0 BYPASS
0
1
1
3 (NV)
3 (NV)
3
3
3. This frequency is set by the Resampler NCO.
FIGURE 25. GENERATING DATA READY PULSES FOR
OUTPUT DATA
In burst systems (such as TDMA), time resolution is needed
for quickly identifying the optimum sample point. The timing
is adjusted by shifting the decimation in the DSP μ P to the
closest sample. Use of timing error in this way may yield a
faster acquisition than a phase-locked loop coherent bit
synchronization. Finding the optimum sample point
minimizes intersymbol interference.
Fine time resolution is needed in CDMA systems to resolve
different multipath rays. In CDMA systems, the demands on
the programmable FIR can only be relieved by the
resampler/interpolation halfband filters. Assume the chip rate
for a baseband CDMA system is 1.2288MHz and PROCCLK
28
Timing NCO
The Timing NCO is very similar to the carrier NCO Phase
Accumulator Section. It provides the NCO driven sample
pulse and associated phase information to the resampling
filter process described in the Re-sampler Filter Section. The
Timing NCO does not include the SIN/COS Section found in
the Carrier NCO. The top level block diagram is shown in
Figure 26.
FN4450.4
May 1, 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50214BVI | 功能描述:上下转换器 120L MQFP INDTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50214BVIZ | 功能描述:上下转换器 120L MQFP INDTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50214VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50215 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
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