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参数资料
| 型号： | HSP50214BVCZ |
| 厂商： | Intersil |
| 文件页数： | 53/62页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER 14BIT 120-MQFP |
| 标准包装： | 24 |
| 功能： | 降频器 |
| RF 型： | AMPS，CDMA，GSM，TDMA |
| 封装/外壳： | 120-BQFP |
| 包装： | 托盘 |
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HSP50214B
CONTROL WORD 19: SERIAL OUTPUT ORDER (SYNCHRONIZED TO PROCCLK) (Continued)
BIT
POSITION
17-15
14-12
11-9
8-6
5-3
2-0
FUNCTION
Link Following Q Data
Link Following
Magnitude Data
Link Following Phase
Data
Link Following
Frequency Data
Link Following AGC
Level Data
Link Following Timing
Error Data
DESCRIPTION
The serial data word, or link, following the Q data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the MAG data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the PHAS data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the FREQ data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the AGC data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the TIMER data word is selected using Table 12
(see Output Section).
CONTROL WORD 20: BUFFER RAM, DIRECT PARALLEL, AND DIRECT SERIAL OUTPUT CONFIGURATION
(SYNCHRONIZED WITH PROCCLK)
BIT
POSITION
31-26
25
24
23-22
21-20
19
18
17
16-14
13-12
FUNCTION
Reserved
Data Source for Least
Significant Bytes of
AOUT and BOUT
Buffered Output Mode
Interface
AOUT Direct Parallel
Output Mode Data
Source
BOUT Direct Parallel
Output Mode Data
Source
Serial Output Sync
Polarity
Serial Output Clock
Polarity
Serial Output Sync
Position
Serial Out Clock
Divider
I Data Serial Output
Tag Bit
53
DESCRIPTION
Reserved.
Output LSBytes, bits (7:0), of AOUT and BOUT can provide:
0- Buffer RAM Mode Output or,
1- Parallel Direct Mode Output.
Buffered Mode Output interfaces to either:
0- 8-bit μ P (address = μ P ASEL(5:#); CLK = μ P RAM read).
1- 16-bit μ P (address = SEL(2:0); CLK = OEBL).
The data word sent by the Direct Parallel Output Mode to AOUT is:
00- I Data. (2’s complement)
01- Magnitude. (O; unsigned binary)
1X- Frequency. (2’s complement)
The data word sent by the Direct Parallel Output Mode to BOUT is:
00- Q Data (2’s complement).
01- Phase (2’s complement).
1X- Magnitude (O; unsigned binary).
0- Normal Sync Mode (active high).
1- Sync Inverted (active low).
0- Output Clock Inverted rising edge aligns with data transitions.
1- Output Clock Normal falling edge aligns with data transitions.
1
0
0- Sync is asserted one bit time after the last bit of the serial word (Late Mode).
1- Sync is asserted one bit time prior to the first bit of the serial word (Early Mode).
000- Serial Output at PROCCLK/16.
001- Serial Output at PROCCLK/8.
010- Serial Output at PROCCLK/4.
011- Serial Output at PROCCLK/2.
1XX- Serial Output at PROCCLK rate.
00- No Tag Bit. LSB of word is passed.
01- 0 Tag Bit. LSB of word is set to zero.
1X- 1 Tag Bit. LSB of word is set to one.
FN4450.4
May 1, 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50214BVI | 功能描述:上下转换器 120L MQFP INDTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50214BVIZ | 功能描述:上下转换器 120L MQFP INDTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 产品:Down Converters 射频:52 MHz to 78 MHz 中频:300 MHz LO频率: 功率增益: P1dB: 工作电源电压:1.8 V, 3.3 V 工作电源电流:120 mA 最大功率耗散:1 W 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PQFP-128 |
| HSP50214VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50215 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
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