参数资料
型号: HSP50214BVCZ
厂商: Intersil
文件页数: 48/62页
文件大小: 0K
描述: IC DOWNCONVERTER 14BIT 120-MQFP
标准包装: 24
功能: 降频器
RF 型: AMPS,CDMA,GSM,TDMA
封装/外壳: 120-BQFP
包装: 托盘
HSP50214B
CONTROL WORD 1: INPUT LEVEL DETECTOR (SYNCHRONOUS TO CLKIN)
BIT
POSITION
31
30
29-14
13-0
FUNCTION
Reserved
Integration Mode
Integration Interval
Input Threshold
DESCRIPTION
Reserved.
0- Integration of magnitude error stops when the interval counter times out.
1- Integration runs continuously. When the interval counter times out, the integrator reloads, and the
results of the integration is sent to a register for the processor to read.
These are the top 16-bits of the 18-bit integration counter, ICPrel. ICPrel = (N)/4+1; where N is the
desired integration period in CLKIN cycles, defined as the number of input samples to be integrated. N
must be a multiple of 4: [0, 4, 8, 12, 16.... , 2 18 ]. Bit 29 is the MSB. If the input is interpolated, then the
zeros must be accounted for, as they will be added to the threshold! If the gated input mode is used, the
same input sample will be accumulated multiple times.
Input Magnitude Threshold. Bits 12-0 correspond to input bits 12-0. The magnitude of the input is added
to this threshold, where the threshold is a signed number. Bit 13 is the MSB.
CONTROL WORD 2: INPUT LEVEL DETECTOR START STROBE (SYNCHRONIZED TO CLKIN)
BIT
POSITION
N/A
FUNCTION
Start Input Level
Detector AGC
Integrator
DESCRIPTION
Writing to this location starts/restarts the input AGC error integrator. The integrator will either restart or
stop when the integration interval counter times out depending on bit 30 of Control Register 1 (see
Microprocessor Write Section).
CONTROL WORD 3: CARRIER NCO CENTER FREQUENCY (SYNCHRONIZED TO CLKIN)
BIT
POSITION
31-0
FUNCTION
Carrier Center
Frequency
DESCRIPTION
These bits control the frequency of the Carrier NCO. The frequency range of the NCO is ± f S / 2 where
f S is the input sample rate. The bits are computed by the equation N = (F NCO / f S )*2 32 . Bit 31 is the MSB.
This location is a holding register. After loading, a transfer to the active register is done by writing to
Control W or d 5 or by generating a SYNCIN1 with Control Word 0, Bit 20 set to 1. The Carrier NCO only
updates ENI is active.
NOTE: In the HSP50214B, if the SYNCIN1 occurs when the NCO is not updating, the load signal is held internal to the part until the next NCO
update.
CONTROL WORD 4: CARRIER PHASE OFFSET (SYNCHRONIZED TO CLKIN)
BIT
POSITION
31-10
9-0
FUNCTION
Reserved
Carrier Phase Offset
DESCRIPTION
Reserved.
These bits, PO, are used to offset the phase of the carrier NCO. The bits are computed by the Equation
PO = INT[(2 10 φ off )/ 2 π ] HEX ; (- π < φ off < π ) for 10-bit 2’s complement representation or from 0 to 2 π for 10-
bit offset binary representation. Bit 9 is the MSB. This location is a holding register. After loading, a
transfer to the active register is done by writing to Control Word 6 or by generating a SYNCIN1 with
Control Word 0, Bit 20 set to 1. The carrier NCO only updates when ENI is active.
CONTROL WORD 5: CARRIER FREQUENCY STROBE (SYNCHRONIZED TO CLKIN)
BIT
POSITION
N/A
FUNCTION
Carrier Frequency
DESCRIPTION
Writing to this address updates the carrier frequency Control Word from the Holding Register.
Strobe
CONTROL WORD 6: CARRIER PHASE STROBE (SYNCHRONIZED TO CLKIN)
BIT
POSITION
N/A
FUNCTION
Carrier Phase Strobe
48
DESCRIPTION
Writing to this address updates the carrier phase offset Control Word with the value written to the phase
offset (PO) register.
FN4450.4
May 1, 2007
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