- 您现在的位置：买卖IC网 > Datasheet目录441 > HSP50214BVIZ (Intersil)IC DOWNCONVERTER 14BIT 120-MQFP Datasheet资料下载
参数资料
| 型号： | HSP50214BVIZ |
| 厂商： | Intersil |
| 文件页数： | 16/62页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER 14BIT 120-MQFP |
| 标准包装： | 24 |
| 功能： | 降频器 |
| RF 型： | AMPS，CDMA，GSM，TDMA |
| 封装/外壳： | 120-BQFP |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
HSP50214B
last 3 it is 2 15 , etc.). The sum of the input bits and the growth
bits cannot exceed the accumulator size. This means that for a
decimation of 32 and 15 input bits, the first accumulator must
be 15 + 25 = 40-bits.
The CIC filter decimation counter can be loaded synchronous
with other PDC chips, using the SYNCIN1 signal and the CIC
External Sync Enable bit. The CIC external Sync Enable is set
via Control Word 0, Bit 19.
SG = FLOOR [ 39 - ( IIN ) - log 2 (R) for 4<R<32
Thus, the value of the CIC Shift Gain word can be
calculated:
5
(EQ. 7)
Halfband Decimating Filters
The Programmable Down Converter has five halfband filter
stages, as shown in Figure 17. Each stage decimates by 2
= 15
for R = 4
and filters out half of the available bandwidth. The first
NOTE: The number of input bits is IIN. (If the number of bits into
the CIC filter is used, the value 40 replaces 39).
For 14-bits, Equation 7 becomes:
halfband, or HB1, has 7 taps. The remaining halfbands;
HB2, HB3, HB4, and HB5; have 11, 15, 19, and 23 taps
respectively. The coefficients for these halfbands are given
in Table 4. Figure 18 shows the frequency response of each
SG = FLOOR [ 25 – log 2 ( R ) ] for 4 < R < 32
5
(EQ. 8A)
of the halfband filters with respect to normalized frequency,
F N . Frequency normalization is with respect to the input
= 15
for R = 4
sampling frequency of each filter section. Each stage is
For 12-bits, Equation 7 becomes:
activated by their respective bit location (15-20) in Control
Word 7. Any combination of halfband filters may be used, or
SG = FLOOR [ 27 – log 2 ( R ) ] for 5 < R < 40
SG = FLOOR [ 29 – log 2 ( R ) ] for 6 < R < 52
SG = FLOOR [ 31 – log 2 ( R ) ] for 9 < R < 64
5
= 15 for 4 ≤ R ≤ 5
For 10-bits, Equation 7 becomes:
5
= 15 for 4 ≤ R ≤ 6
For 8-bits, Equation 7 becomes:
5
for 4 ≤ R ≤ 9
= 15
(EQ. 8B)
(EQ. 8C)
(EQ. 8D)
all may be bypassed.
Figure 15 is a plot of Equations 8A through 8D. The 4-bit CIC
Shift Gain word has a range from 0 to 15. The 6-bit
Decimation Factor counter preload field, (R-1), has a range
from 0 to 63, limited by the input resolution as cited above.
Using the Input Gain Adjust Control Signals
The input gain offset control GAINADJ(2:0)) is provided to
offset the signal gain through the part, i.e., to keep the CIC
filter output level constant as the analog front end
attenuation is changed. The gain adjust offset is 6dB per
code, so the gain adjust range is 0 to 42dB. For example, if
12dB of attenuation is switched in at the receiver RF front
end, a code of 2 would increase the gain at the input to the
CIC filter up 12dB so that the CIC filter output would not drop
by 12dB. This fixed gain adjust eliminates the need for the
software to continually normalize.
One must exercise care when using this function as it can
cause overflow in the CIC filter. Each gain adjust in the
shifter from the gain adjust control signals is the equivalent
of an extra bit of input. The maximum decimation in the CIC
is reduced accordingly. With a decimation of 32, all 40-bits of
the CIC are needed, so no input offset gain is allowed. As
the decimation is reduced, the allowable offset gain
increases. Table 3 shows the decimation range versus
desired offset gain range. Table 3 assumes that the CIC Shift
Gain has been programmed per Equation 7 or 8A.
16
FN4450.4
May 1, 2007
相关PDF资料 |
PDF描述 |
|---|---|
| HSP50216KIZ | IC DOWNCONVERTER DGTL 4CH 196BGA |
| HSP50415VIZ | IC MODULATOR PROGRAMABLE 100MQFP |
| HSSLS-CALBL-013 | HEATSINK 48W SPOT OSRAM PREVALED |
| HSSLS-CALCL-005 | HEATSINK 21W SPOT PHILIPS SLM |
| HSSLS-CALCL-013 | HEATSINK 48W DOWNLIGHT 140 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50214VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50215 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
| HSP50215EVAL | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
| HSP50215VC | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital UpConverter |
发布紧急采购，3分钟左右您将得到回复。