- 您现在的位置：买卖IC网 > Datasheet目录441 > HSP50214BVIZ (Intersil)IC DOWNCONVERTER 14BIT 120-MQFP Datasheet资料下载
参数资料
| 型号： | HSP50214BVIZ |
| 厂商： | Intersil |
| 文件页数： | 44/62页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER 14BIT 120-MQFP |
| 标准包装： | 24 |
| 功能： | 降频器 |
| RF 型： | AMPS，CDMA，GSM，TDMA |
| 封装/外壳： | 120-BQFP |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页当前第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
HSP50214B
TABLE 22. DEFINITION OF ADDRESS MAP (Continued)
124 CHANNELS
READ
STATUS
CODE C(2:0)
TYPE
READ ADDRESS A(2:0)
101
AGC Data
AGC (must write to location 10 to
? ? ?
and Timing sample)
110
111
Error
Not Used
Not Used
000- AGC LSB (lower 8-bits of linear
Control Word 3 used by multiplier)
mmmmmmmm LSB.
001- AGC MSB (4 shift control bits
and first three bits of linear) Control
Word oeeeemmm MSB. This yields
11-bits of the linear control mantissa.
010- Timing error LSB, not stabilized.
011- Timing error MSB, not
stabilized.
200kHz
CHANNEL
FREQUENCY
Don’t Care
Status
111- Status (6:0) consisting of
(6:4)-FIFO depth when output is in
FIFO Buffer RAM Output Mode.
(3)-EMPTY signalling the FIFO is
empty and the read pointer cannot be
advanced (Active High).
(2)-FULL signalling the FIFO is full
and new samples will not be written
(Active High).
(1)-READYB Output buffer has
reached the programmed threshold
in FIFO mode or the programmed
number of samples have been taken
in snapshot mode. (Active Low).
(0)-INTEGRATION has been
completed in the input level detector
and is ready to be read. (Active
High).
FREQUENCY
FIGURE 47. RECEIVE SIGNAL FREQUENCY SPECTRUM
RF/IF Considerations
The input frequency to the PDC is dependent on the A/D
converter selected, the RF/IF frequency, the bandwidth of
interest and the sample rate of the converter. If the A/D
converter has sufficient bandwidth, then undersampling
techniques can be used to downconvert IF/RF frequencies
as part of the digitizing process, using the PDC to process a
lower frequency alias of the input signal.
For example, a 70MHz IF can be sampled at 40MHz and the
resulting 10MHz signal alias can be processed by the PDC
to perform the desired downconversion/tuning and filtering. If
Applications
Composite Filter Response Example
For this example consider a total receive band roughly
25MHz wide containing 124 200kHz wide FDM channels as
shown in Figure 47. The design goal for the PDC is to tune
to and filter out a single 200kHz FDM channel from the FDM
band, passing only baseband samples onto the baseband
processor at a multiple of the 270.8 KBPS bit rate.
44
the IF signal is less than 1/2 the sample frequency then
standard oversampling techniques can be used to process
the signal. Of the two techniques, only undersampling allows
part of the down conversion function to be brought into the
digital domain just through sampling, assuming that a
sampling frequency can be found that keeps the alias
signals low and that the A/D converter has the bandwidth to
accept the unconverted analog signal.
FN4450.4
May 1, 2007
相关PDF资料 |
PDF描述 |
|---|---|
| HSP50216KIZ | IC DOWNCONVERTER DGTL 4CH 196BGA |
| HSP50415VIZ | IC MODULATOR PROGRAMABLE 100MQFP |
| HSSLS-CALBL-013 | HEATSINK 48W SPOT OSRAM PREVALED |
| HSSLS-CALCL-005 | HEATSINK 21W SPOT PHILIPS SLM |
| HSSLS-CALCL-013 | HEATSINK 48W DOWNLIGHT 140 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50214VC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214VI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50215 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
| HSP50215EVAL | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:DSP Modulator Evaluation Board |
| HSP50215VC | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital UpConverter |
发布紧急采购，3分钟左右您将得到回复。