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| 型号： | IDT88P8341BHI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 62/96页 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 标准包装： | 24 |
| 系列： | * |
| 其它名称： | 88P8341BHI |
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65
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
TABLE 83 - SPI-4 TO SPI-3 PFP REGISTER (0x00)
Field
Bits
Length
Initial Value
NR_LID
2:0
3
0b011
Reserved
7:3
5
0x00
TABLE 84 - NR_LID FIELD ENCODING
NR_LID
Maximum Number
Maximum Buffer Segments
of LIDs
for a LID
0b000
1
508
0b001
4
256
0b010
8
128
0b011
16
64
0b100
32
0b101
64
16
9.3.14 Block base 0x1900 registers
SPI-4 to SPI-3 PFP register (Block_base 0x1900 +
Register_Offset 0x00)
TheSPI-4ingresstoSPI-3egressPacketFragmentProcessorregisters are
at Block_Base 0x1900 + Register_offset 0x00. A SPI-4 to SPI-3 PFP Register
has read and write access. The bit fields of a SPI-4 to SPI-3 PFP Register are
described.
NR_LID
The maximum number of LIDs for the SPI-3 physical
interface that will ever be used is programmed into the NR_LID field. Once
configured after reset, this value can not be changed. Fewer LIDs can be used
by not activating some of the LIDs, but more LIDs than the value in NR_LID are
not allowed and will generate an error. The NR_LID field is important, as the
buffersegmentpoolisdividedamongthenumberofLIDsprogrammedintothe
NR_LID field.
The 128 Kbyte SPI-4 to SPI-3 buffer segment pool for storing packet
fragments for the SPI-3 egress is available for the SPI-3 physical port. A
configurablepartofthebuffersegmentpoolcanbeassignedtoeachoftheLIDs,
asdeterminedbytheNR_LIDvalue,for theSPI-3physicalinterface.Thebuffer
size (M) for a LID can be configured in multiples of 256 bytes. Modifications of
the buffer size allocated to a LID are supported only when the logical port
associated to the LID is disabled. Attempts to allocate more memory than
available will generate an allocation error event. The indirect access module
willdiscardtheattempt.
The 128 Kbyte SPI-4 to SPI-3 buffer segment pool is divided into 508 buffer
segments.Eachbuffersegmentisequalto256bytes.Thebuffersegmentsare
shared among the number of logical ports defined by the static NR_LID
configuration. The buffer segments do not have to be equally shared among
theallocatedLIDs.Onebuffersegmentcorrespondstoapacketfragmenttobe
forwarded to the SPI-3 egress physical interface.
Anexampleoftheuseofthebuffersegmentpoolfollows.ForaSPI-3egress
interface that will never have more than eight LIDs, set the NR_LID field for this
interfaceto0x02.Thisallows128buffersegmentsforaLIDwiththetotalnumber
of buffer segments for all eight LIDs equal to 508.
Let’s say you want only 24 (base 10) buffer segments for one of the LIDs.
Program field M for that LID to 0x018 (24 base 10). Let’s say you want to set
the per-LID starving backpressure for the SPI-4 ingress interface when 20 of
the 24 allocated buffers for this LID are full. In other words, you want to assert
SPI-4 ingress starving when only 4 segments remain for this LID. Since
M=0x018, N=1 from the description of the M field above [Block_base 0x1800].
Setting the FREE_SEGMENT_S field to 4 then yields the desired
THRESHOLD_S of 4. Similarly, to set the per-LID SPI-4 ingress hungry
threshold,THRESHOLD_H,totripwhenonly6buffersegmentsremainforthis
LID, program the FREE_SEGMENT_H field for this LID to 6.
相关PDF资料 |
PDF描述 |
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| IDT88P8342BHI | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| IDT88P8344BHI | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| IDT89H24NT24G2ZBHLG | IC PCI SW 24LANE 24PORT 324BGA |
| IDT89HPES16NT2ZBBCG | IC PCI SW 16LANE 2PORT 484-CABGA |
| IDT89HPES24NT3ZBBXG | IC PCI SW 24LANE 3PORT 420-SBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8342BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8342BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8344 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
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