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参数资料
| 型号： | IDT88P8344BHGI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/98页 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 标准包装： | 24 |
| 系列： | * |
| 其它名称： | 88P8344BHGI |
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12
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
Name
I/O type
Parallel microprocessor
Serial Peripheral Interface Pin Use Description
pin used
SDI
I-ST CMOS
WRB
Serial data in, rise edge sampling
SDO
B-PU CMOS
DBUS[0]
Serial data out, falling edge driving
CSB
I-ST CMOS
CSB
Chip select, active low. SDO is tri-stated when CSB is high
SCLK
I-ST CMOS
RDB
Inputclock
INTB
OD CMOS
----------
Interrupt, active low, open drain
SPI_EN
I-PU CMOS
----------
Dedicated input. High selects SPI microprocessor interface (internally pulled up)
TABLE 9 – MISCELLANEOUS
Name
I/O type
Description
REF_CLK
I-ST CMOS
Master clock input
OCLK[3:0]
O LVTTL
Clock outputs that can be used for SPI-3, phase-shifted to avoid simultaneously switching outputs
CLK_SEL[3:0] I-PU CMOS
Clock select inputs for internal PLL, internal MCLK, and OCLK[3:0] outputs
TIMEBASE
B-PU CMOS
Timeout signal for counters
GPIO[4:0]
B-PU CMOS
General purpose I/O or internal state monitor pins
TDI
I-PU CMOS
JTAG data in (internally pulled up)
TDO
O-Z CMOS
JTAG data out
TCK
I-ST CMOS
JTAGclock
TMS
I-PU CMOS
JTAG mode (internally pulled up)
TRSTB
I-PU CMOS
JTAG reset, active low (internally pulled up). Pull down for normal operation.
RESETB
I-PD CMOS
Master hardware reset, active low
NOTE
:
1. Inputs with internal pull-ups do not need external pull-ups unless connected to PCB trace (except TRSTB).
Parallel microprocessor Interface
The Parallel microprocessor interface is configurable to work in Intel or Motorola modes. Be sure to connect SPI_EN to a logic low when
using the parallel microprocessor interface mode.
Name
I/O type
Description
MPM
I-PU CMOS Microprocessor mode: 0=Motorola Mode, 1=Intel mode (sampled after reset)
CSB
I-ST CMOS Chip select; active low
RDB
I-ST CMOS RDB: Read control, active low (in Intel mode), or
DSB: Data strobe, active low (in Motorola mode)
WRB
I-ST CMOS WRB: Write control; active low; (in Intel mode), or
R/WB: Read/write control; when high, read is active; when low, write is active; (in Motorola mode)
ADD[5:0]
I-PU CMOS Address bus
DBUS[7:0]
B-PU CMOS Data bus
INTB
OD CMOS
Interrupt, active low, open drain
SPI_EN
I-PU CMOS Logic low selects parallel microprocessor interface (internally pulled up, sampled after reset)
TABLE 7 – PARALLEL MICROPROCESSOR INTERFACE
TABLE 8 – SERIAL MICROPROCESSOR INTERFACE (SERIAL PERIPHERAL INTERFACE MODE)
Four pins multiplexed with parallel microprocessor pins. Be sure to connect SPI_EN to a logic high when using the serial microprocessor
interface mode.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBCG | 功能描述:IC PCI SW 10LANE 4PORT 324BGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:PRECISE™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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