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参数资料
| 型号： | IDT88P8344BHGI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 76/98页 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 标准包装： | 24 |
| 系列： | * |
| 其它名称： | 88P8344BHGI |
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78
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
TABLE 125 - VERSION NUMBER REGISTER
(REGISTER_OFFSET 0x30)
Field
Bits
Length
Initial Value
Version
7:0
8
0x01
ID
15:8
8
0xF9
General purpose I/O (Block_base 0x0900 +
Register_offset 0x20)
TABLE 123 - GPIO REGISTER (REGISTER_OFFSET
0x20)
Field
Bits
Length
Initial Value
ADDRESS
15:0
16
0x0000
Reserved
23:16
8
0x00
BIT
28:24
5
0x00
Reserved
31:29
3
0x0
TABLE 124 - GPIO MONITOR TABLE (5 ENTRIES
0x21-0x25 FOR GPIO[0] THROUGH GPIO[4])
Field
Bits
Length
Initial
Value
DIR_OUT
4:0
5
0x00
Reserved
7:5
3
0x0
LEVEL
12:8
5
0x00
Reserved
15:13
3
0x0
MONITOR_EN
20:16
5
0x00
A bit in the indirect access space can be selected for monitoring by the
ADDRESS and BIT fields in the GPIO monitor table.
The GPIO Monitor Table for GPIO[0] is at Common_Module 0x8000+
Block_base 0x0900 + Register_offset 0x21 = 0x8921.
The GPIO Monitor Table for GPIO[1] is at Common_Module 0x8000+
Block_base 0x0900 + Register_offset 0x22 = 0x8922.
The GPIO Monitor Table for GPIO[2] is at Common_Module 0x8000+
Block_base 0x0900 + Register_offset 0x23 = 0x8923.
The GPIO Monitor Table for GPIO[3] is at Common_Module 0x8000+
Block_base 0x0900 + Register_offset 0x24 = 0x8924.
The GPIO Monitor Table for GPIO[4] is at Common_Module 0x8000+
Block_base 0x0900 + Register_offset 0x25 = 0x8925.
ADDRESS[15:0]
Usedforconfiguringtheindirectaddressselect when
the GPIO pins are put into monitor mode.
BIT[4:0]
Used for selecting the register bit (1 of 32) for a GPIO put into
monitormode.
BIT[4:0]=0x00 selects data bit 0.
…
BIT[4:0]=0x1F selects data bit 31.
Version number register (common module
Block_base 0x0900 + Register_offset 0x30)
The version number register is a read-only sixteen-bit register at
Common_module 0x8000 + Block_base 0x0900 + Register_offset 0x30 =
0x8930 in the indirect register access space. The version number register
contains hard-coded values that can be read to verify the microprocessor read
path is correct, and that the correct part is installed.
VERSION
The hardware version is read from this field.
ID
The hardware identification is read from this field.
Five general purpose I/O pins are provided. Each pin I/O direction is
controlledbytheDIR_OUTfieldintheGPIOregister.ThelogicallevelonaGPIO
pin is controlled by the LEVEL field in the GPIO register if DIR_OUT=1
(pin=output), or sensed if DIR_OUT=0 (pin=input). Optionally, the LEVEL bit
can monitor the logic level of any bit selected from the indirect access space if
MONITOR_EN is set high. With MONITOR_EN set high, bits in the indirect
access space can be selected for monitoring by the ADDRESS and BIT fields
in the GPIO monitor table.
The general purpose I/O registers are at common module Block_base
0x0900 and have read and write access.
DIR_OUT[4:0] Used for configuring each GPIO pin as either an input or
anoutput
0=GPIO pin is an input
1=GPIO pin is an output
LEVEL[4:0]
Used for sensing or driving each GPIO pin
0=GPIO pin is sensed as a logic zero if an input , or driven to a logic zero if
anoutput
1=GPIO pin is sensed as a logic one if an input , or driven to a logic one if
anoutput
MONITOR_EN [4:0] Usedforenablingthemonitoroutputfunctionforeach
GPIO pin. GPIO pins used as monitors must also be configured to be outputs.
All GPIO pins must be used as either monitors or as normal I/O; no mixing of
the monitoring function and the normal I/O function is permitted.
0=GPIO pin is used as an I/O pin
1=GPIO pin is used as a monitor pin
GPIO monitor table (Block_base 0x0900 +
Register_offset 0x21 - 0x25)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBCG | 功能描述:IC PCI SW 10LANE 4PORT 324BGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:PRECISE™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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