- 您现在的位置：买卖IC网 > PDF目录180126 > M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 PDF资料下载
参数资料
| 型号： | M2V56S30ATP-6 |
| 元件分类： | DRAM |
| 英文描述： | 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封装： | 0.400 X 0.875 INCH, TSOP2-54 |
| 文件页数： | 13/51页 |
| 文件大小： | 430K |
| 代理商： | M2V56S30ATP-6 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页
20
MITSUBISHI ELECTRIC
May '02
MITSUBISHI LSIs
SDRAM (Rev.1.41)
Single Data Rate
M2V56S20/ 30/ 40 AKT
256M Synchronous DRAM
M2V56S20/ 30/ 40 ATP
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
DQM
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
BURST INTERRUPTION
[ Read Interrupted by Read ]
Burst read operation can be interrupted by new read of any active bank. Random column access is
allowed. READ to READ interval is minimum 1 CLK.
[ Read Interrupted by Write ]
Burst read operation can be interrupted by write of any active bank. Random column access is allowed.
In this case, the DQ should be controlled adequately by using the DQM to prevent the bus contention.
The output is disabled automatically 2 cycle after WRITE assertion.
READ
Yb
0
00
Qc0
Qc1
Qc2
Qc3
Read Interrupted by Read (CL=2, BL=4)
READ
Ya
0
00
Qa0
Qa1
Qa2
Qb0
READ
Yc
0
10
ACT
Xa
00
Read Interrupted by Write (CL=2, BL=4)
READ
Ya
0
00
Qa0
Da0
Da1
Da2
Write
Ya
0
00
Da3
Output disable by DQM
by WRITE
相关PDF资料 |
PDF描述 |
|---|---|
| M30-6000206 | 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| M30-6000406 | 4 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| M30-6001106 | 11 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| M30-6011006 | 20 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| M30-6011506 | 30 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M2V56S30ATP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30ATP-8 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-6 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
发布紧急采购，3分钟左右您将得到回复。