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参数资料
| 型号： | M2V56S30ATP-6 |
| 元件分类： | DRAM |
| 英文描述： | 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封装： | 0.400 X 0.875 INCH, TSOP2-54 |
| 文件页数： | 48/51页 |
| 文件大小： | 430K |
| 代理商： | M2V56S30ATP-6 |
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6
MITSUBISHI ELECTRIC
May '02
MITSUBISHI LSIs
SDRAM (Rev.1.41)
Single Data Rate
M2V56S20/ 30/ 40 AKT
256M Synchronous DRAM
M2V56S20/ 30/ 40 ATP
VddQ and VssQ are supplied to the Output Buffers only.
Power Supply for the memory array and peripheral circuitry.
Din Mask / Output Disable: When DQMU/L is high in burst write, Din for
the current cycle is masked. When DQMU/L is high in burst read, Dout
is disabled at the next but one cycle.
Data In and Data out are referenced to the rising edge of CLK.
Combination of /RAS, /CAS, /WE defines basic commands.
A0-12 specify the Row / Column Address in conjunction with BA0,1.
The Row Address is specified by A0-12. The Column Address is
specified by A0-9,11. A10 is also used to indicate precharge option.
When A10 is high at a read / write command, an auto precharge is
performed. When A10 is high at a precharge command, all banks are
precharged.
Bank Address: BA0,1 specifies one of four banks to which a command
is applied. BA0,1 must be set with ACT, PRE, READ, WRITE
commands.
Input / Output
Power Supply
Input
VddQ, VssQ
Vdd, Vss
DQM
DQMU/L
DQ0-15
BA0,1
A0-12
/RAS, /CAS, /WE
Chip Select: When /CS is high, any command are masked except
CLK, CKE and DQM
Input
/CS
Clock Enable: CKE controls internal clock. When CKE is low, internal
clock for the following cycle is ceased. CKE is also used to select auto
/ self refresh. After self refresh mode is started, CKE becomes
asynchronous input. Self refresh is maintained as long as CKE is low.
Input
Master Clock: All other inputs are referenced to the rising edge of CLK.
Input
CKE
CLK
PIN FUNCTION
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M2V56S30ATP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30ATP-8 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-6 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
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