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参数资料
| 型号： | M2V56S30ATP-6 |
| 元件分类： | DRAM |
| 英文描述： | 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封装： | 0.400 X 0.875 INCH, TSOP2-54 |
| 文件页数： | 51/51页 |
| 文件大小： | 430K |
| 代理商： | M2V56S30ATP-6 |
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9
MITSUBISHI ELECTRIC
May '02
MITSUBISHI LSIs
SDRAM (Rev.1.41)
Single Data Rate
M2V56S20/ 30/ 40 AKT
256M Synchronous DRAM
M2V56S20/ 30/ 40 ATP
FUNCTION TRUTH TABLE
Current State
/CS
/RAS
/CAS
/WE
Address
Command
Action
IDLE
H
X
DESEL
NOP
L
H
X
NOP
L
H
L
X
TBST
ILLEGAL*2
L
H
L
X
BA, CA, A10
READ / WRITE
ILLEGAL*2
L
H
BA, RA
ACT
Bank Active, Latch RA
L
H
L
BA, A10
PRE / PREA
NOP*4
L
H
X
REFA
Auto-Refresh*5
L
Op-Code,
Mode-Add
MRS
Mode Register Set*5
ROW ACTIVE
H
X
DESEL
NOP
L
H
X
NOP
L
H
L
X
TBST
NOP
L
H
L
H
BA, CA, A10
READ / READA
Begin Read, Latch CA,
Determine Auto-Precharge
L
H
L
BA, CA, A10
WRITE /
WRITEA
Begin Write, Latch CA,
Determine Auto-Precharge
L
H
BA, RA
ACT
Bank Active / ILLEGAL*2
L
H
L
BA, A10
PRE / PREA
Precharge / Precharge All
L
H
X
REFA
ILLEGAL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
READ
H
X
DESEL
NOP (Continue Burst to END)
L
H
X
NOP
NOP (Continue Burst to END)
L
H
L
X
TBST
Terminate Burst
L
H
L
H
BA, CA, A10
READ / READA
Terminate Burst, Latch CA,
Begin New Read, Determine
Auto-Precharge*3
L
H
L
BA, CA, A10
WRITE /
WRITEA
Terminate Burst, Latch CA,
Begin Write, Determine Auto-
Precharge*3
L
H
BA, RA
ACT
Bank Active / ILLEGAL*2
L
H
L
BA, A10
PRE / PREA
Terminate Burst, Precharge
L
H
X
REFA
ILLEGAL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M2V56S30ATP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30ATP-8 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-6 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
| M2V56S30TP-7 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
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