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| 型号： | MC13892JVLR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 113/158页 |
| 文件大小： | 0K |
| 描述： | IC PMU I.MX51/37/35/27 186MAPBGA |
| 标准包装： | 1,000 |
| 应用： | 电池管理，显示器（LED 驱动器），手持/移动设备，电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 186-LFBGA |
| 供应商设备封装： | 186-PBGA（12x12） |
| 包装： | 带卷 (TR) |
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FUNCTIONAL DEVICE OPERATION
CONNECTIVITY
DETECTION COMPARATORS
VBUS detection and qualification is accomplished with two comparators, detailed in Table 101 . Comparator results are used
to generate associated interrupts, and sense and masking bits are available through SPI (refer to SPI Bitmap ). Comparator
thresholds are specified for the minimum detect levels, and bits can be used in combination to qualify a VBUS window. Events
are communicated via (INT pin) interrupts and managed through SPI registers to allow the application processor to turn off the
PHY.
As described in Battery Interface and Control , the battery charger system is designed to work with the USB system physical
connector. The power input is then brought into an end product on the VBUS pin of the USB connector. For fault condition
robustness, VBUS over-voltage protection is included to protect the system and flag an over-voltage situation to the processor
via the USBOVI interrupt.
Table 101. USB Detect Specifications
Parameter
V BUS Valid Comparator trip level
Condition
Min
4.4
Typ
–
Max
4.65
Units
V
Including the USBI debounce
V BUS Valid trip delay
BVALID Comparator Threshold
BVALID Trip Delay
Over-voltage Protection Level
Over-voltage Protection Disconnect Time
Rising trip delay
Falling trip delay
Rising and falling edge
Rising trip delay for turn on event
Falling trip delay for turn on event
Rising and falling edge
20
8.0
4.0
20
8.0
5.6
–
–
–
–
–
–
–
–
24
12
4.4
40
12
6.0
1.0
ms
ms
V
ms
V
μ s
ID DETECTOR
The ID detector is primarily used to determine if a mini-A or mini-B style plug has been inserted into a mini-AB style receptacle
on the application. However, it is also supports two additional modes which are outside of the USB standards: a factory mode
and a non-USB accessory mode. The state of the ID detection can be read via the SPI to poll dedicated sense bits for a floating,
grounded, or factory mode condition on the UID pin. There are also dedicated maskable interrupts for each UID condition as well.
The ID detector is based on an on-chip pull-up controlled by the IDPUCNTRL bit. If set high the pull-up is a current source, if
set low it is a resistor. ID100KPU switches in an additional pull-up from VCORE to UID (independent of IDPUCNTRL). The UID
The ID detector thresholds are listed in Table 102 . Further interpretations of non-USB accessory detection may be made for
custom vendor applications by evaluation of the ADIN7 conversion reading.
Table 102. ID Detection Thresholds
UID Pin External
Connection
Resistor to Ground
Grounded
Floating
Voltage Applied
UID Pin Voltage
0.18 * VCORE < UID
< 0.77 * VCORE
0 < UID < 0.12 *
VCORE
0.89 * VCORE < UID
< VCORE
3.6V < UID (88)
IDFLOATS
0
0
1
1
IDGNDS
1
0
1
1
IDFACTORYS
0
0
0
1
Accessory
Non-USB accessory is attached (per CEA-
936-A spec)
A type plug (USB Default Slave) is
attached (per CEA-936-A spec)
B type plug (USB Host, OTG default
master or no device) is attached.
Factory mode
Notes
88. UID maximum voltage is 5.25 V
MC13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
113
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