- 您现在的位置：买卖IC网 > PDF目录16590 > MC13892JVLR2 (Freescale Semiconductor)IC PMU I.MX51/37/35/27 186MAPBGA PDF资料下载
参数资料
| 型号： | MC13892JVLR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 59/158页 |
| 文件大小： | 0K |
| 描述： | IC PMU I.MX51/37/35/27 186MAPBGA |
| 标准包装： | 1,000 |
| 应用： | 电池管理，显示器（LED 驱动器），手持/移动设备，电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 186-LFBGA |
| 供应商设备封装： | 186-PBGA（12x12） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页当前第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页
FUNCTIONAL DEVICE OPERATION
OPERATING MODES
In order to distinguish a non-PCUT initiated Cold Start from a Cold Start after a PCUT, the PCI interrupt should be checked
by software. The PCI interrupt is cleared by software or when cycling through the Off state.
Because the PCUT system quickly disables all of the power tree, the battery voltage may recover to a level with the
appearance of a valid supply once the battery is unloaded. However, upon a restart of the IC and power sequencer, the surge of
current through the battery and trace impedances can once again cause the BP node to drop below UVDET. This chain of cyclic
power down / power up sequences is referred to as “ambulance mode”, and the power control system includes strategies to
minimize the chance of a product falling into and getting stuck in ambulance mode.
First, the successful recovery out of a PCUT requires the BP node to rise above BPON, providing hysteretic margin from the
UVDET threshold. Secondly, the number of times the PCUT mode is entered is counted with the counter PCCOUNT[3:0], and
the allowed count is limited to PCMAXCNT[3:0] set through the SPI. When the contents of both become equal, then the next
PCUT will not be supported and the system will go to Off mode.
After a successful power up after a PCUT (i.e., valid power is reestablished, the system comes out of reset, and the processor
reassumes control), software should clear the PCCOUNT[3:0] counter. Counting of PCUT events is enabled via the
PCCOUNTEN bit. This mode is only supported if the power cut mode feature is enabled by setting the PCEN bit. When not
enabled, in case of a power failure, the state machine will transition to the Off state. SPI control is not possible during a PCUT
event and the interrupt line is kept low. SPI configuration for PCUT support should also include setting the PCUTEXPB=1 (see
the Silent Restart from PCUT Event section later in this chapter).
Internal MemHold Power Cut
As described above, a momentary power interruption will put the system into the Internal MemHold Power Cut state if PCUTs
are enabled. The backup coin cell will now supply the MC13892 core along with the 32 kHz crystal oscillator, the RTC system
and coin cell backed up registers. All regulators and switchers will be shut down to preserve the coin cell and RTC as long as
possible.
Both RESETB and RESETBMCU are tripped, bringing the entire system down along with the supplies and external clock
drivers, so the only recovery out of a Power Cut state is to reestablish power and initiate a Cold Start.
If the PCT timer expires before power is reestablished, the system transitions to the Off state and awaits a sufficient supply
recovery.
SILENT RESTART FROM PCUT EVENT
If a short duration power cut event occurs (such as from a battery bounce, for example), it may be desirable to perform a silent
restart, so the system is re-initialized without alerting the user. This can be configured by setting the PCUTEXPB bit to a “1” at
booting or after a Cold Start. This bit resets on RTCPORB, therefore any subsequent Cold Start can first check the status of
PCUTEXPB and the PCI bit. The PCUTEXPB is cleared to “0” when transitioning from PCUT to Off. If there was a PCUT interrupt
and PCUTEXPB is still a “1”, then the state machine has not transitioned through Off, which confirms that the PCT timer has not
expired during the PCUT event (i.e., a successful power cut). In case of a successful power cut, a silent restart may be
appropriate.
If PCUTEXPB is found to be a “0” after the Cold Start where PCI is found to be a “1”, then it is inferred that the PCT timer has
expired before power was reestablished, flagging an unsuccessful power cut or first power up, so the startup user greeting may
be desirable for playback.
SILENT SYSTEM RESTART WITH WDI EVENT
A mechanism is provided for recovery if the system software somehow gets into an abnormal state which requires a system
reset, but it is desired to make the reset a silent event so as to happen without end user awareness. The default response to WDI
going low is for the state machine to transition to the Off state (when WDIRESET = 0). However, if WDIRESET = 1, the state
machine will go to Cold Start without passing through Off mode
A WDIRESET event will generate a maskable WDIRESETI interrupt and also increment the PCCOUNT counter. This function
is unrelated to PCUTs, but it shares the PCUT counter so that the number of silent system restarts can be limited by the
programmable PCMAXCNT counter.
When PCUT support is used, the software should set the PCUTEXPB bit to “1”. Since this bit resets with RTCPORB, it will not
be reset to “0” if a WDI falls and the state machine goes straight to the Cold Start state. Therefore, upon a restart, the software
can detect a silent system restart, if there is a WDIRESETI interrupt and PCUTEXPB = 1. The application may then determine
that an inconspicuous restart without showing may be more appropriate than launching into the welcoming routine.
A PCUT event does not trip the WDIRESETI bit.
MC13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
59
相关PDF资料 |
PDF描述 |
|---|---|
| ECM15DTAS | CONN EDGECARD 30POS R/A .156 SLD |
| GBM25DRTN-S13 | CONN EDGECARD 50POS .156 EXTEND |
| AK670M-5-R | CABLE MINI USB 4PIN 5M 1.1 VERS |
| EEM28DSXI | CONN EDGECARD 56POS DIP .156 SLD |
| MC13892JVKR2 | IC PMU I.MX51/37/35/27 139MAPBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC13892VK | 功能描述:PMIC 解决方案 PMUIC w/4 buck/12 LDO rg RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MC13892VKR2 | 功能描述:PMIC 解决方案 PMUIC w/4 buck/12 LDO rg RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MC13892VL | 功能描述:PMIC 解决方案 5/28V BCK/BST PMUIC RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MC13892VLR2 | 功能描述:PMIC 解决方案 5/28V BCK/BST PMUIC RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| MC1-38RX | 制造商:3M Electronic Products Division 功能描述:NON INSL COPPER SEAMLESS RING TE 制造商:3M Electronic Products Division 功能描述:80610253439 制造商:3M Electronic Products Division 功能描述:80610253439 MC1-38RX S/LOK RING TERMINAL |
发布紧急采购，3分钟左右您将得到回复。