参数资料
型号: MC13892JVLR2
厂商: Freescale Semiconductor
文件页数: 85/158页
文件大小: 0K
描述: IC PMU I.MX51/37/35/27 186MAPBGA
标准包装: 1,000
应用: 电池管理,显示器(LED 驱动器),手持/移动设备,电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 186-LFBGA
供应商设备封装: 186-PBGA(12x12)
包装: 带卷 (TR)
FUNCTIONAL DEVICE OPERATION
SUPPLIES
product damage. If a short-circuit condition is detected, the LDO will be disabled by resetting its VxEN bit while at the same time
an interrupt SCPI will be generated to flag the fault to the system processor.
The SCPI interrupt is maskable through the SCPM mask bit.
The SCP feature is enabled by setting the REGSCPEN bit. If this bit is not set, then not only is no interrupt generated, but also
the regulators will not automatically be disabled upon a short-circuit detection. However, the built-in current limiter will continue
to limit the output current of the regulator. Note that by default, the REGSCPEN bit is not set, so at startup none of the regulators
that are in an overload condition will be disabled
VAUDIO AND VVIDEO SUPPLIES
The primary applications of these power supplies are for audio, and TV-DAC. However these supplies could also be used for
other peripherals if one of these functions is not required. Low-power modes and programmable Standby options can be used
to optimize power efficiency during Deep Sleep modes.
An external PNP is utilized for VVIDEO to avoid excess on-chip power dissipation at high loads, and large differential between
BP and output settings. For stability reasons a small minimum ESR may be required. In the Low-power mode for VVIDEO an
internal bypass path is used instead of the external PNP. External PNP devices are always to be connected to the BP line in the
application. The recommended PNP device is the ON Semiconductor NSS12100XV6T1G which is capable of handling up to
250 mW of continuous dissipation at minimum footprint and 75 °C of ambient. For use cases where up to 500mW of dissipation
is required, the recommended PNP device is the ON Semiconductor ? NSS12100UW3TCG. For stability reasons a small
minimum ESR may be required.
VAUDIO is implemented with an integrated PMOS pass FET and has a dedicated input supply pin VINAUDIO.
The following tables contain the specifications for the VVIDEO, VAUDIO.
Table 54. VVIDEO and VAUDIO Voltage Control
Parameter
VVIDEO
VAUDIO
Value
00
01
10
11
00
01
10
11
Function
Output = 2.700 V
Output = 2.775 V
Output = 2.500 V
Output = 2.600 V
Output = 2.300 V
Output = 2.500 V
Output = 2.775 V
Output = 3.000 V
ILoad max
250 mA / 350 mA
250 mA / 350 mA
250 mA / 350 mA
250 mA / 350 mA
150 mA
150 mA
150 mA
150 mA
LOW VOLTAGE SUPPLIES
VDIG and VPLL are provided for isolated biasing of the Baseband system PLLs for clock generation in support of protocol and
peripheral needs. Depending on the lineup and power requirements, these supplies may be considered for sharing with other
loads, but noise injection must be avoided and filtering added if necessary, to ensure suitable PLL performance. The VDIG and
VPLL regulators have a dedicated input supply pin: VINDIG for the VDIG regulator, and VINPLL for the VPLL regulator. VINDIG
and VINPLL can be connected to either BP or a 1.8V switched mode power supply rail, such as from SW4 for the two lower set
points of each regulator VPLL[1:0] and VDIG[1:0] = [00], [01]. In addition, when the two upper set points are used VPLL[1:0] and
VDIG[1:0] = [10], [11], the inputs (VINDIG and VINPLL) can be connected to either BP of a 2.2 V nominal external switched mode
power supply rail to improve power dissipation.
Table 55. VPLL and VDIG Voltage Control
Parameter
VPLL[1:0]
VDIG[1:0]
Value
00
01
10
11
00
01
10
11
Function
output = 1.2 V
output = 1.25 V
output = 1.5 V
output = 1.8 V
output = 1.05 V
output = 1.25 V
output = 1.65 V
output = 1.8 V
ILoad max
50 mA
50 mA
50 mA
50 mA
50 mA
50 mA
50 mA
50 mA
Input Supply
BP or 1.8 V
BP or 1.8 V
BP or External Switcher
BP or External Switcher
BP or 1.8 V
BP or 1.8 V
BP or External Switcher
BP or External Switcher
MC13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
85
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