参数资料
型号: MC68MH360VR33LR2
厂商: Freescale Semiconductor
文件页数: 5/158页
文件大小: 0K
描述: IC MPU QUICC 33MHZ 357-PBGA
标准包装: 180
系列: M683xx
处理器类型: M683xx 32-位
速度: 33MHz
电压: 5V
安装类型: 表面贴装
封装/外壳: 357-BBGA
供应商设备封装: 357-PBGA(25x25)
包装: 带卷 (TR)
QMC Supplement
pvec = (int *) (getvbr() + (((vecblk << 5) + 0x1E) * 4));/*
calculate
vector address */
*pvec = (int) SCC1esr;
/* init int vector */
pdpr->TRR4 = 8;
/* init timer ref */
pdpr->TMR4.PS = 0;
/* init prescalar */
pdpr->TMR4.OM = 1;
/* select toggle */
pdpr->TMR4.FRR = 1;
/* restart after ref reac */
pdpr->TMR4.ICLK = 1;
/* master clock */
pdpr->TGCR.RST4 = 1;
/* enable timer */
pdpr->PAPAR |= 0x8000
/* enable TOUT4 pin */
pdpr->PADIR |= 0x8000;
/* pin 15 is an output */
pdpr->TRR3 = 174;
/* init timer ref */
pdpr->TMR3.PS = 0;
/* init prescalar */
pdpr->TMR3.OM = 0;
/* select pulse */
pdpr->TMR3.FRR = 1;
/* restart after ref reac */
pdpr->TMR3.ICLK = 3;
/* external clock */
pdpr->TGCR.RST3 = 1;
/* enable timer */
pdpr->PAPAR |= 0x3000;/* enable TOUT3 & TIN3 */
pdpr->PADIR |= 0x2000;
/* pin 13 is an
output */
/* SDCR has been initialized by the debugger */
pdpr->SIMODE.CRTa = 1;
/* common syncs & clocks */
pdpr->SIMODE.RFSDa = 1;
/* receive frame sync 1 clk dly */
pdpr->SIMODE.TFSDa = 1;
/* xmit frame sync 1 clk dly */
pdpr->SICR.SC1 = 1;
/* SCC1 is TDM */
pdpr->PAPAR |= 0x100;
/* enable L1RCLKa */
/* PAPAR, PADIR & PAODR are cleared at reset */
pdpr->PCPAR = 0x800;
/* enable L1RSYNCa */
/* Port C registers are cleared at reset */
pdpr->SIGMR = 4;
/* enable TDMa */
pdpr->SIRAM[0] = 0x8042;
/* init 1st receive element */
pdpr->SIRAM[1] = 0x8042;
/* init 2nd receive element */
pdpr->SIRAM[2] = 0x8042;
/* init 3rd receive element */
pdpr->SIRAM[3] = 0x8043;
/* init 4th receive element */
pdpr->SIRAM[64] = 0x8042;
/* init 1st xmit element */
pdpr->SIRAM[65] = 0x8042;
/* init 2nd xmit element */
pdpr->SIRAM[66] = 0x8042;
/* init 3rd xmit element */
pdpr->SIRAM[67] = 0x8043;
/* init 4th xmit element */
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For More Information On This Product,
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