参数资料
型号: MCIMX534AVV8C
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封装: 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件页数: 101/178页
文件大小: 4711K
代理商: MCIMX534AVV8C
Electrical Characteristics
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 3
Freescale Semiconductor
29
4.3.2
LPDDR2 I/O DC Parameters
The LPDDR2 I/O pads support DDR2/LVDDR2, LPDDR2, and DDR3 operational modes.
4.3.2.1
DDR2 Mode I/O DC Parameters
The DDR2 interface fully complies with JESD79-2E DDR2 JEDEC standard release April, 2008. The
parameters in Table 11 are guaranteed per the operating ranges in Table 6, unless otherwise noted.
Low-level output current
(1.65-3.1V OVDD)
Iol
Vout = 0.2
×OVDD
Low drive
Medium drive
High drive
Max drive
2.1
4.2
6.3
8.4
——
mA
High-Level DC input voltage1, 2
VIH
0.7
× OVDD
OVDD
V
Low-Level DC input voltage1, 2
VIL
0
0.3
× OVDD
V
Input Hysteresis
VHYS
OVDD = 1.875 V
OVDD = 2.775 V
0.25
0.34
0.45
—V
Schmitt trigger VT+2, 3
VT+
0.5
× OVDD
V
Schmitt trigger VT–2, 3
VT–
0.5
× OVDD
V
Input current (no pull-up/down)
Iin
Vin = OVDD or 0
2
μA
Input current (22 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
161
2
μA
Input current (47 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
76
2
μA
Input current (100 k
Ω Pull-up)
Iin
Vin = 0 V
Vin= OVDD
——
36
2
μA
Input current (100 k
Ω Pull-down)
Iin
Vin = 0 V
Vin = OVDD
——
2
36
μA
Keeper Circuit Resistance
1304
—k
Ω
1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other
methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
2 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s.
3 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
4 Use an off-chip pull resistor of less than 60 k
Ω to override this keeper.
Table 10. GPIO I/O DC Electrical Characteristics (continued)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
相关PDF资料
PDF描述
MCP23008T-E/SO 8 I/O, PIA-GENERAL PURPOSE, PDSO18
MCP23008-E/ML 8 I/O, PIA-GENERAL PURPOSE, PQCC20
MCP23S08T-E/ML 8 I/O, PIA-GENERAL PURPOSE, PQCC20
MCP23S08T-E/SS 8 I/O, PIA-GENERAL PURPOSE, PDSO20
MCP23008-E/P 8 I/O, PIA-GENERAL PURPOSE, PDIP18
相关代理商/技术参数
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