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参数资料
| 型号： | ML60852A |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 7/82页 |
| 文件大小： | 370K |
| 代理商： | ML60852A |
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FEDL60852A-03
1Semiconductor
ML60852A
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(4) Operation of Control Transfer
Control transfer is the default transfer mode for host-device communications as outlined in USB specifications.
Control transfer uses structured message pipes and is composed of the following three stages:
(a) Setup stage
In this stage, a setup token and 8 bytes of setup data are transmitted from the host. The ML60852A decodes the
setup token, and automatically stores the 8 bytes of setup data in the setup register. When this is completed
normally, the ML60852A returns ACK to the host.
The 8-byte setup data is the standard request code defined in Section 9.3 of the USB Standards, or a code of the
requests unique to each device class, etc. The request is decoded on the local MCU side.
(b) Data stage
If the request specified by the 8-byte setup data is also accompanied by transfer of parameter data from the host
to the device, the transfer is a control write transfer, and the OUT token and the data packet are transmitted
from the host. When these are received normally, the ML60852A stores the parameter data in the EP0 receive
FIFO and returns ACK to the host.
If the request is accompanied by transfer of parameter data from the device to the host, the transfer is a control
read transfer, and when the host sends the IN token, the ML60852A sends the parameter data that was already
stored beforehand in the EP0 transmit FIFO by the local MCU. When the host receives this normally, it returns
an ACK to the ML60852A.
On the other hand, in the case of requests that do not contain any parameter data that need to be transmitted or
received, data stage will not be present and the processing proceeds directly to the status stage from the setup
stage.
(c) Status stage
The status stage is a stage intended for reporting the status of the result of executing a request from the device
to the host. During a control write transfer or a control transfer without data, an IN token is sent by the host,
and the ML60852A returns a response to it. During a control read transfer, an OUT token and a zero length
packet (ZLP) is sent by the host, and the ML60852A returns a response to it.
During the above control transfers, the local MCU needs only to read from or write to the 8-byte setup registers
mapped at 00h to 07h, the EP0 transmit FIFO mapped at 70h, and the EP0 receive FIFO mapped at 78h
according to the interrupt cause, and all other operations will be carried out automatically by the ML60852A.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ML60852ATBZ010 | 功能描述:USB 接口集成电路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| ML60852ATBZ03A | 制造商:ROHM Semiconductor 功能描述: |
| ML-60-V2/80721 | 制造商:Thomas & Betts 功能描述: |
| ML61 | 制造商:MINILOGIC 制造商全称:MINILOGIC 功能描述:Series Positive Voltage Detector |
| ML61_09 | 制造商:MINILOGIC 制造商全称:MINILOGIC 功能描述:Positive Voltage Detector CMOS Low Power Consumption : Typical 1.0uA at Vin=2.0V |
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