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参数资料
| 型号： | MT48H8M16LFB4-75 IT:K TR |
| 厂商： | Micron Technology Inc |
| 文件页数： | 31/63页 |
| 文件大小： | 0K |
| 描述： | IC SDRAM 128MBIT 133MHZ 54VFBGA |
| 标准包装： | 1 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 133MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 54-VFBGA |
| 供应商设备封装： | 54-VFBGA（8x8） |
| 包装： | 标准包装 |
| 其它名称： | 557-1530-6 |
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128Mb: x16 Mobile SDRAM
Operation
Figure 27:
READ With Auto Precharge Interrupted by a READ
T0
T1
T2
T3
T4
T5
T 6
T7
C LK
C OMMAND
NOP
READ - AP
BANK n
NOP
READ - AP
BANK m
NOP
NOP
NOP
NOP
Internal
BANK n
Pa g e A c tive
READ with Burst of 4
Interrupt Burst, Pre c har g e
t RP - BANK n
I d le
tRP - BANK m
S tates
BANK m
ADDRE SS
Pa g e A c tive
BANK n ,
C OL a
READ with Burst of 4
BANK m ,
C OL d
Pre c har g e
DQ
D OUT
a
D OUT
a +1
D OUT
d
D OUT
d +1
C L = 3 (BANK
n )
C L = 3 (BANK m )
DON ’ T C ARE
Notes:
1. DQM is LOW.
Figure 28:
READ With Auto Precharge Interrupted by a WRITE
T0
T1
T2
T3
T4
T5
T 6
T7
C LK
C OMMAND
READ - AP
BANK n
NOP
NOP
NOP
WRITE - AP
BANK m
NOP
NOP
NOP
Internal
BANK n
Pa g e
A c tive
READ with Burst of 4
Interrupt Burst, Pre c har g e
t RP - BANK n
I d le
t WR - BANK m
S tates
BANK m
ADDRE SS
BANK n ,
C OL a
Pa g e A c tive
WRITE with Burst of 4
BANK m ,
C OL d
Write-Ba c k
1
DQM
DQ
D OUT
a
D IN
d
D IN
d +1
D IN
d +2
D IN
d +3
C L = 3 (BANK n )
DON ’ T C ARE
Notes:
1. DQM is HIGH at T2 to prevent D OUT a + 1 from contending with D IN d at T4.
WR is met, where t WR begins when the WRITE to bank m is registered. The last valid
WRITE with Auto Precharge
1. Interrupted by a READ (with or without auto precharge): When a READ to bank m
registers, it will interrupt a WRITE on bank n , with the data-out appearing 2 or 3
clocks later, depending on CL. The precharge to bank n will begin after t WR is met,
where t WR begins when the READ to bank m is registered. The last valid WRITE to
bank n will be data-in registered one clock prior to the READ to bank m (see
Figure 29).
2. Interrupted by a WRITE (with or without auto precharge): When a WRITE to bank m
registers, it will interrupt a WRITE on bank n . The precharge to bank n will begin after
t
data WRITE to bank n will be data registered one clock prior to a WRITE to bank m
(see Figure 30 on page 32).
PDF: 09005aef8237e877/Source: 09005aef8237e8d8
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. C 2/07 EN
31
Micron Technology, Inc., reserves the right to change products or specifications without notice.
?2006 Micron Technology, Inc. All rights reserved.
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| MT48H8M16LFB4-8 | 制造商:Micron Technology Inc 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA |
| MT48H8M16LFB4-8 IT | 制造商:Micron Technology Inc 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA |
| MT48H8M16LFB4-8 IT TR | 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并联 电源电压:2.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
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