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参数资料
| 型号： | RC28F256P33T85A |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 16M X 16 FLASH 3V PROM, 85 ns, PBGA64 |
| 封装： | BGA-64 |
| 文件页数： | 65/96页 |
| 文件大小： | 1378K |
| 代理商： | RC28F256P33T85A |
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Numonyx StrataFlash Embedded Memory (P33)
Datasheet
November 2007
68
Order Number: 314749-05
page 44). Next, perform a read operation using the address offset corresponding to the
register to be read. Table 30, “Device Identifier Information” on page 56 shows the
address offsets of the Protection Registers and Lock Registers. PR data is read 16 bits
at a time.
11.4.8.2
Programming the Protection Registers
To program any of the Protection Registers, first issue the Program Protection Register
command at the parameter’s base address plus the offset to the desired Protection
Register (see Section 9.6, “Device Command Bus Cycles” on page 44). Next, write the
desired Protection Register data to the same Protection Register address (see
The device programs the 64-bit and 128-bit user-programmable Protection Register
data 16 bits at a time (see Figure 40, “Protection Register Programming Flowchart” on
page 76). Issuing the Program Protection Register command outside of the Protection
Register’s address space causes a program error (SR[4] set). Attempting to program a
locked Protection Register causes a program error (SR[4] set) and a lock error (SR[1]
set).
Note:
When programming the OTP bits in the protection registers for a Top Parameter
Device, the following upper address bits must also be driven properly: A[Max:17]
driven high (VIH) for TSOP and Easy BGA packages, and A[Max:16] driven high (VIH)
for QUAD+ SCSP.
11.4.8.3
Locking the Protection Registers
Each Protection Register can be locked by programming its respective lock bit in the
Lock Register. To lock a Protection Register, program the corresponding bit in the Lock
Register by issuing the Program Lock Register command, followed by the desired Lock
Register data (see Section 9.6, “Device Command Bus Cycles” on page 44). The
physical addresses of the Lock Registers are 0x80 for register 0 and 0x89 for register 1.
These addresses are used when programming the lock registers (see Table 30, “Device
Bit 0 of Lock Register 0 is already programmed during the manufacturing process at the
“factory”, locking the lower, pre-programmed 64-bit region of the first 128-bit
Protection Register containing the unique identification number of the device. Bit 1 of
Lock Register 0 can be programmed by the user to lock the user-programmable, 64-bit
region of the first 128-bit Protection Register. When programming Bit 1 of Lock Register
0, all other bits need to be left as ‘1’ such that the data programmed is 0xFFFD.
Lock Register 1 controls the locking of the upper sixteen 128-bit Protection Registers.
Each of the 16 bits of Lock Register 1 correspond to each of the upper sixteen 128-bit
Protection Registers. Programming a bit in Lock Register 1 locks the corresponding
128-bit Protection Register.
Caution:
After being locked, the Protection Registers cannot be unlocked.
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