参数资料
型号: SX1211I084TRT
厂商: Semtech
文件页数: 18/92页
文件大小: 0K
描述: IC SNGL-CHIP TXRX 32-TQFN
标准包装: 1
频率: 860 ~ 960MHz
数据传输率 - 最大: 200kbps
调制或协议: FSK,OOK
应用: AMR,ISM,安防门禁
功率 - 输出: 12.5dBm
灵敏度: -113dBm
电源电压: 2.1 V ~ 3.6 V
电流 - 接收: 3mA
电流 - 传输: 25mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 32-TQFN
包装: 标准包装
产品目录页面: 584 (CN2011-ZH PDF)
配用: 1210-1060-2-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-2-ND - 868MHZ ASPICS SX1211 CHIP SET
1210-1060-6-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-6-ND - 868MHZ ASPICS SX1211 CHIP SET
1210-1060-1-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-1-ND - 868MHZ ASPICS SX1211 CHIP SET
其它名称: SX1211I084DKR
SX1211
WIRELESS & SENSING
3.3. Transmitter Description
The SX1211 is set to transmit mode when MCParam_Chip_mode = 100.
Amplification
Second
up-conversion
First up-conversion
I
Q
LO2 Tx
Interpolation
filters
DACs
DDS
Waveform
generator
Data
Clock
I
RFIO
PA
Q
LO1 Tx
I
Q
LO2 Tx
RF
IF
Baseband
Figure 8: Transmitter Architecture
3.3.1. Architecture Description
The baseband I and Q signals are digitally generated by a DDS whose digital to analog converters (DAC) followed
by two anti-aliasing low-pass filters transform the digital signal into analog in-phase (I) and quadrature (Q)
components whose frequency is the selected frequency deviation (Fdev).
1
Fdev
I(t)
Q(t)
Figure 9: I(t), Q(t) Overview
In FSK mode, the relative phase of I and Q is switched by the input data between -90° and +90° with continuous
phase. The modulation is therefore performed at this initial stage, since the information contained in the phase
difference will be converted into a frequency shift when the I and Q signals are up-converted in the first mixer
stage. This first up-conversion stage is duplicated to enhance image rejection. The FSK convention is such that:
DATA = ' ' 1 ' ' ? Frf + Fdev
DATA = ' ' 0 ' ' ? Frf ? Fdev
Rev 8 – February 2013
Page 18 of 92
www.semtech.com
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