参数资料
型号: SX1211I084TRT
厂商: Semtech
文件页数: 20/92页
文件大小: 0K
描述: IC SNGL-CHIP TXRX 32-TQFN
标准包装: 1
频率: 860 ~ 960MHz
数据传输率 - 最大: 200kbps
调制或协议: FSK,OOK
应用: AMR,ISM,安防门禁
功率 - 输出: 12.5dBm
灵敏度: -113dBm
电源电压: 2.1 V ~ 3.6 V
电流 - 接收: 3mA
电流 - 传输: 25mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 32-TQFN
包装: 标准包装
产品目录页面: 584 (CN2011-ZH PDF)
配用: 1210-1060-2-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-2-ND - 868MHZ ASPICS SX1211 CHIP SET
1210-1060-6-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-6-ND - 868MHZ ASPICS SX1211 CHIP SET
1210-1060-1-ND - 915MHZ ASPICS SX1211 CHIP SET
1210-1059-1-ND - 868MHZ ASPICS SX1211 CHIP SET
其它名称: SX1211I084DKR
SX1211
WIRELESS & SENSING
3.3.6. Interpolation Filter
After digital to analog conversion, both I and Q signals are smoothed by interpolation filters. This block low-pass
filters the digitally generated signal, and prevents the alias signals from entering the modulators. Its bandwidth can
be programmed with the register RXParam_InterpFiltTx, and should be set to:
BW ? 3 * ? Fdev +
?
?
BR ?
2 ??
Where Fdev is the programmed frequency deviation as set in MCParam_Freq_dev, and BR is the physical Bit Rate
of transmission.
Notes:
Low interpolation filter bandwidth will attenuate the baseband I/Q signals thus reducing the power of the FSK
signal. Conversely, excessive bandwidth will degrade spectral purity.
For the wideband FSK modulation, for example when operating in DTS mode, the recommended filter setting
can not be reached. However, the impact upon spectral purity will be negligible, due to the already wideband
channel.
3.3.7. Power Amplifier
The Power Amplifier (PA) integrated in the SX1211 operates under a regulated voltage supply of 1.8 V. The
external PA choke inductor is biased by an internal regulator output made available on pin 29 (VR_PA). Thanks to
these features, the PA output power is consistent over the power supply range. This is important for mobile
applications where this allows both predictable RF performance and battery life.
3.3.7.1. Rise and Fall Times Control
In OOK mode, the PA ramp times can be accurately controlled through the MCParam_PA_ramp register. Those
bits directly control the slew rate of VR_PA output (pin 29).
Table 11: PA Rise/Fall Times
MCParam_PA_ramp
00
01
10
11
t VR_PA
3 us
8.5 us
15 us
23 us
t PA_OUT (rise / fall)
2.5 / 2 us
5 / 3 us
10 / 6 us
20 / 10 us
Rev 8 – February 2013
Page 20 of 92
www.semtech.com
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