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参数资料
| 型号： | SX1211I084TRT |
| 厂商： | Semtech |
| 文件页数： | 4/92页 |
| 文件大小： | 0K |
| 描述： | IC SNGL-CHIP TXRX 32-TQFN |
| 标准包装： | 1 |
| 频率： | 860 ~ 960MHz |
| 数据传输率 - 最大： | 200kbps |
| 调制或协议： | FSK，OOK |
| 应用： | AMR，ISM，安防门禁 |
| 功率 - 输出： | 12.5dBm |
| 灵敏度： | -113dBm |
| 电源电压： | 2.1 V ~ 3.6 V |
| 电流 - 接收： | 3mA |
| 电流 - 传输： | 25mA |
| 数据接口： | PCB，表面贴装 |
| 天线连接器： | PCB，表面贴装 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-TQFN |
| 包装： | 标准包装 |
| 产品目录页面： | 584 (CN2011-ZH PDF) |
| 配用： | 1210-1060-2-ND - 915MHZ ASPICS SX1211 CHIP SET 1210-1059-2-ND - 868MHZ ASPICS SX1211 CHIP SET 1210-1060-6-ND - 915MHZ ASPICS SX1211 CHIP SET 1210-1059-6-ND - 868MHZ ASPICS SX1211 CHIP SET 1210-1060-1-ND - 915MHZ ASPICS SX1211 CHIP SET 1210-1059-1-ND - 868MHZ ASPICS SX1211 CHIP SET |
| 其它名称： | SX1211I084DKR |
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SX1211
WIRELESS & SENSING
Index of Tables
Table 1: Ordering Information ........................................................ 1
Table 2: SX1211 Pinouts ............................................................... 7
Table 3: Absolute Maximum Ratings ............................................. 8
Table 4: Operating Range .............................................................. 8
Table 5: Power Consumption Specification ................................... 8
Table 6: Frequency Synthesizer Specification ............................... 9
Table 7: Transmitter Specification ................................................. 9
Table 8: Receiver Specification.................................................... 10
Table 9: Digital Specification ........................................................ 11
Table 10: MCParam_Freq_band Setting ..................................... 15
Table 11: PA Rise/Fall Times....................................................... 20
Table 12: Operating Modes ......................................................... 33
Table 13: Pin Configuration vs. Chip Mode ................................. 33
Table 14: Data Operation Mode Selection ................................... 35
Table 15: Config vs. Data SPI Interface Selection ....................... 36
Table 16: Status of FIFO when Switching Between Different
Modes of the Chip ........................................................................ 39
Table 17: Interrupt Mapping in Continuous Rx Mode .................. 42
Table 18: Interrupt Mapping in Continuous Tx Mode ................... 42
Table 19: Relevant Config. Registers in Continuous Mode ........ 43
Acronyms
Table 20: Interrupt Mapping in Buffered Rx and Stby Modes .......46
Table 21: Interrupt Mapping in Buffered Tx Mode ........................46
Table 22: Relevant Configuration Registers in Buffered Mode .....47
Table 23: Interrupt Mapping in Rx and Stby in Packet Mode........55
Table 24: Interrupt Mapping in Tx Packet Mode ...........................55
Table 25: Relevant Configuration Registers in Packet Mode .......56
Table 26: Registers List ................................................................58
Table 27: MCParam Register Description ....................................58
Table 28: IRQParam Register Description....................................60
Table 29: RXParam Register Description .....................................62
Table 30: SYNCParam Register Description ................................63
Table 31: TXParam Register Description .....................................64
Table 32: OSCParam Register Description ..................................64
Table 33: PKTParam Register Description ...................................65
Table 34: Crystal Resonator Specification ....................................66
Table 35: Reference Design BOM ................................................74
Table 36: Tools Ordering Information ...........................................75
Table 37: FSK Rx Filters vs. Bit Rate ...........................................76
Table 38: OOK Rx Filters vs. Bit Rate ..........................................76
BOM
BR
BW
CCITT
CP
CRC
DAC
DDS
DLL
ERP
ETSI
FCC
Fdev
FIFO
FS
FSK
GUI
IC
ID
IF
IRQ
ITU
LFSR
LNA
Bill Of Materials
Bit Rate
Bandwidth
Comité Consultatif International
Téléphonique et Télégraphique - ITU
Charge Pump
Cyclic Redundancy Check
Digital to Analog Converter
Direct Digital Synthesis
Dynamically Linked Library
Equivalent Radiated Power
European Telecommunications Standards
Institute
Federal Communications Commission
Frequency Deviation
First In First Out
Frequency Synthesizer
Frequency Shift Keying
Graphical User Interface
Integrated Circuit
IDentificator
Intermediate Frequency
Interrupt ReQuest
International Telecommunication Union
Linear Feedback Shift Register
Low Noise Amplifier
LO
LSB
MSB
NRZ
NZIF
OOK
PA
PCB
PFD
PLL
POR
RBW
RF
RSSI
Rx
SAW
SPI
SR
Stby
Tx
uC
VCO
XO
XOR
Local Oscillator
Least Significant Bit
Most Significant Bit
Non Return to Zero
Near Zero Intermediate Frequency
On Off Keying
Power Amplifier
Printed Circuit Board
Phase Frequency Detector
Phase-Locked Loop
Power On Reset
Resolution BandWidth
Radio Frequency
Received Signal Strength Indicator
Receiver
Surface Acoustic Wave
Serial Peripheral Interface
Shift Register
Standby
Transmitter
Microcontroller
Voltage Controlled Oscillator
Crystal Oscillator
eXclusive OR
Rev 8 – February 2013
Page 4 of 92
www.semtech.com
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