
CHAPTER 3 CPU FUNCTION
101
Preliminary User’s Manual U16031EJ2V1UD
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Bit Units for Manipulation
Address
Function Register Name
Symbol
R/W
1 Bit
8 Bits 16 Bits
After Reset
FFFFFF0CH
UF0 configuration/interface/
endpoint descriptor register 41
UF0CIE41
R/W
√
Undefined
FFFFFF0DH
UF0 configuration/interface/
endpoint descriptor register 42
UF0CIE42
R/W
√
Undefined
FFFFFF0EH
UF0 configuration/interface/
endpoint descriptor register 43
UF0CIE43
R/W
√
Undefined
FFFFFF0FH
UF0 configuration/interface/
endpoint descriptor register 44
UF0CIE44
R/W
√
Undefined
FFFFFF10H
UF0 configuration/interface/
endpoint descriptor register 45
UF0CIE45
R/W
√
Undefined
FFFFFF11H
UF0 configuration/interface/
endpoint descriptor register 46
UF0CIE46
R/W
√
Undefined
FFFFFF12H
UF0 configuration/interface/
endpoint descriptor register 47
UF0CIE47
R/W
√
Undefined
FFFFFF13H
UF0 configuration/interface/
endpoint descriptor register 48
UF0CIE48
R/W
√
Undefined
FFFFFF14H
UF0 configuration/interface/
endpoint descriptor register 49
UF0CIE49
R/W
√
Undefined
FFFFFF15H
UF0 configuration/interface/
endpoint descriptor register 50
UF0CIE50
R/W
√
Undefined
FFFFFF16H
UF0 configuration/interface/
endpoint descriptor register 51
UF0CIE51
R/W
√
Undefined
FFFFFF17H
UF0 configuration/interface/
endpoint descriptor register 52
UF0CIE52
R/W
√
Undefined
FFFFFF18H
UF0 configuration/interface/
endpoint descriptor register 53
UF0CIE53
R/W
√
Undefined
FFFFFF19H
UF0 configuration/interface/
endpoint descriptor register 54
UF0CIE54
R/W
√
Undefined
FFFFFF1AH
UF0 configuration/interface/
endpoint descriptor register 55
UF0CIE55
R/W
√
Undefined
FFFFFF1BH
UF0 configuration/interface/
endpoint descriptor register 56
UF0CIE56
R/W
√
Undefined
FFFFFF1CH
UF0 configuration/interface/
endpoint descriptor register 57
UF0CIE57
R/W
√
Undefined
FFFFFF1DH
UF0 configuration/interface/
endpoint descriptor register 58
UF0CIE58
R/W
√
Undefined
FFFFFF1EH
UF0 configuration/interface/
endpoint descriptor register 59
UF0CIE59
R/W
√
Undefined
FFFFFF1FH
UF0 configuration/interface/
endpoint descriptor register 60
UF0CIE60
R/W
√
Undefined
FFFFFF20H
UF0 configuration/interface/
endpoint descriptor register 61
UF0CIE61
R/W
√
Undefined
FFFFFF21H
UF0 configuration/interface/
endpoint descriptor register 62
UF0CIE62
R/W
√
Undefined