参数资料
型号: ADSP-21375KSWZ-2B
厂商: Analog Devices Inc
文件页数: 41/56页
文件大小: 0K
描述: IC DSP 32BIT 266MHZ 208-MQFP
产品培训模块: SHARC Processor Overview
标准包装: 36
系列: SHARC®
类型: 浮点
接口: DAI,DPI
时钟速率: 266MHz
非易失内存: ROM(256 kB)
芯片上RAM: 64kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 208-LQFP 裸露焊盘
供应商设备封装: 208-LQFP-EP(28x28)
包装: 托盘
S/PDIF Transmitter
For the ADSP-21371, serial data input to the S/PDIF transmitter
can be formatted as left-justified, I 2 S, or right-justified with
word widths of 16-, 18-, 20-, or 24-bits. The following sections
provide timing for the transmitter.
S/PDIF Transmitter-Serial Input Waveforms
Figure 26 shows the right-justified mode. LRCLK is high for the
left channel and low for the right channel. Data is valid on the
rising edge of serial clock. The MSB is delayed 12-bit clock peri-
ods (in 20-bit output mode) or 16-bit clock periods (in 16-bit
output mode) from an LRCLK transition, so that when there are
64 serial clock periods per LRCLK period, the LSB of the data
will be right-justified to the next LRCLK transition.
S/PDIF transmitter information does not apply to the
ADSP-21375.
Figure 27 shows the default I 2 S-justified mode. LRCLK is low
for the left channel and high for the right channel. Data is valid
on the rising edge of serial clock. The MSB is left-justified to an
LRCLK transition but with a single serial clock period delay.
Figure 28 shows the left-justified mode. LRCLK is high for the
left channel and low for the right channel. Data is valid on the
rising edge of serial clock. The MSB is left-justified to an LRCLK
transition with no MSB delay.
DAI_P20–1
FS
DAI_P20–1
SCLK
t RJD
LEFT/RIGHT CHANNEL
DAI_P20–1
SDATA
LSB
MSB
MSB–1
MSB–2
LSB+2
LSB+1
LSB
Figure 26. Right-Justified Mode
DAI_P20–1
FS
DAI_P20–1
SCLK
t I2SD
LEFT/RIGHT CHANNEL
DAI_P20–1
SDATA
MSB
MSB–1
MSB–2
LSB+2
LSB+1
LSB
Figure 27. I 2 S-Justified Mode
DAI_P20–1
FS
DAI_P20–1
SCLK
t LJD
LEFT/RIGHT CHANNEL
DAI_P20–1
SDATA
MSB
MSB–1
MSB–2
LSB+2
LSB+1
LSB
Figure 28. Left-Justified Mode
Rev. D | Page 41 of 56 | April 2013
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