参数资料
| 型号： | ADT7468ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 33/81页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADT7468 |
| 标准包装： | 1 |
| 其它名称： | EVAL-ADT7468EB EVAL-ADT7468EB-ND |
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ADT7468
Configuration Register 4 (Reg. 0x7D)
<3:2> AINL, input threshold for 2-wire fan speed
measurements.
00 = ±20 mV
01 = ±40 mV
10 = ±80 mV
11 = ±130 mV
FAN SPIN-UP
The ADT7468 has a unique fan spin-up function. It spins the
fan at 100% PWM duty cycle until two TACH pulses are
detected on the TACH input. Once two TACH pulses have been
detected, the PWM duty cycle goes to the expected running
value, for example, 33%. The advantage is that fans have
different spin-up characteristics and take different times to
overcome inertia. The ADT7468 runs the fans just fast enough
to overcome inertia and is quieter during spin-up than fans
programmed to spin up for a given spin-up time.
Fan Start-Up Timeout
To prevent the generation of false interrupts as a fan spins up
(because it is below running speed), the ADT7468 includes a
fan start-up timeout function. During this time, the ADT7468
looks for two TACH pulses. If two TACH pulses are not
detected, then an interrupt is generated.
Using Configuration Register 4 (0x40) Bit 5 (FSPDIS), this
functionality can be changed (see the Disabling Fan Start-Up
Timeout section).
PWM1 Configuration (Reg. 0x5C)
<2:0> spin, startup timeout for PWM1.
000 = No startup timeout
001 = 100 ms
010 = 250 ms default
011 = 400 ms
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
PWM2 Configuration (Reg. 0x5D)
<2:0> spin, startup timeout for PWM2.
000 = No startup timeout
001 = 100 ms
010 = 250 ms default
011 = 400 ms
PWM3 Configuration (Reg. 0x5E)
<2:0> spin, start-up timeout for PWM3.
000 = No startup timeout
001 = 100 ms
010 = 250 ms default
011 = 400 ms
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
Disabling Fan Start-Up Timeout
Although fan start-up times make fan spin-ups much quieter
than fixed-time spin-up times, the option exists to use fixed
spin-up times. Setting Bit 5 (FSPDIS) to 1 in Configuration
Register 1 (Reg. 0x40) disables the spin-up for two TACH
pulses. Instead, the fan spins up for the fixed time as selected in
Reg. 0x5C to Reg. 0x5E.
PWM LOGIC STATE
The PWM outputs can be programmed high for 100% duty
cycle (noninverted) or low for 100% duty cycle (inverted).
PWM1 Configuration (Reg. 0x5C)
<4> INV
0 = Logic high for 100% PWM duty cycle
1 = Logic low for 100% PWM duty cycle
PWM2 Configuration (Reg. 0x5D)
<4> INV
0 = Logic high for 100% PWM duty cycle
1 = Logic low for 100% PWM duty cycle
PWM3 Configuration (Reg. 0x5E)
<4> INV
0 = Logic high for 100% PWM duty cycle
1 = Logic low for 100% PWM duty cycle
Low Frequency Mode PWM Drive Frequency
The PWM drive frequency can be adjusted for the application.
Register 0x5F to Register 0x61 configure the PWM frequency
for PWM1 to PWM3, respectively. In high frequency mode,
the PWM drive frequency is always 22.5 kHz and cannot
be changed.
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
Rev. 3 | Page 33 of 81 | www.onsemi.com
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| ADT7470 | 制造商:AD 制造商全称:Analog Devices 功能描述:Temperature Sensor Hub and Fan Controller |
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