参数资料
| 型号： | ADT7468ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 73/81页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADT7468 |
| 标准包装： | 1 |
| 其它名称： | EVAL-ADT7468EB EVAL-ADT7468EB-ND |
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ADT7468
Table 37. Register 0x63 – Enhanced Acoustics Register 2 (Power-On Default = 0x00)
Bit
<2:0>
Name
ACOU3
R/W 1
Read/write
Description
These bits select the ramp rate applied to the PWM3 output. Instead of PWM3 jumping instantaneously to
its newly calculated speed, PWM3 ramps gracefully at the rate determined by these bits. This effect
enhances the acoustics of the fan being driven by the PWM3 output.
Time Slot Increase Time for 33% to 100%
000 = 1 35 sec
001 = 2 17.6 sec
010 = 3 11.8 sec
011 = 5 7 sec
100 = 8 4.4 sec
101 = 12 3 sec
110 = 24 1.6 sec
111 = 48 0.8 sec
<3>
<6:4>
EN3
ACOU2
Read/write
Read/write
When this bit is 1, acoustic enhancement is enabled on PWM3 output.
These bits select the ramp rate applied to the PWM2 output. Instead of PWM2 jumping instantaneously to
its newly calculated speed, PWM2 ramps gracefully at the rate determined by these bits. This effect
enhances the acoustics of the fans being driven by the PWM2 output.
Time Slot Increase Time for 33% to 100%
000 = 1 35 sec
001 = 2 17.6 sec
010 = 3 11.8 sec
011 = 5 7 sec
100 = 8 4.4 sec
101 = 12 3 sec
110 = 24 1.6 sec
<7>
EN2
Read/write
When this bit is 1, acoustic enhancement is enabled on PWM2 output.
1
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 38. PWM Minimum Duty Cycle Registers
Register Address
0x64
0x65
0x66
R/W 1
Read/write
Read/write
Read/write
Description
PWM1 minimum duty cycle.
PWM2 minimum duty cycle.
PWM3 minimum duty cycle.
Power-On Default
0x80 (50% duty cycle)
0x80 (50% duty cycle)
0x80 (50% duty cycle)
Bit
<7:0>
Name
PWM duty cycle
R/W 1
Read/write
Description
These bits define the PWM MIN duty cycle for PWMx.
These registers become read-only when the ADT7468 is in automatic fan control mode.
0x00 = 0% duty cycle (fan off).
0x40 = 25% duty cycle.
0x80 = 50% duty cycle.
0xFF = 100% duty cycle (fan full speed).
1
Table 39. T MIN Registers 1
Register Address
0x67
0x68
0x69
R/W 2
Read/write
Read/write
Read/write
Description
Remote 1 temperature T MIN .
Local temperatue T MIN .
Remote 2 temperature T MIN .
Power-On Default
0x5A (90°C)
0x5A (90°C)
0x5A (90°C)
1
2
These are the T MIN registers for each temperature channel. When the temperature measured exceeds T MIN , the appropriate fan runs at minimum speed and increases
with temperature according to T RANGE .
These registers become read-only when the Configuration Register 1 lock bit is set. Any further attempts to write to these registers have no effect.
Rev. 3 | Page 73 of 81 | www.onsemi.com
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