参数资料
| 型号： | ADT7468ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 66/81页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADT7468 |
| 标准包装： | 1 |
| 其它名称： | EVAL-ADT7468EB EVAL-ADT7468EB-ND |
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ADT7468
Table 24. Register 0x37—Dynamic T MIN Control Register 2 (Power-On Default = 0x00) 1
Bit
<2:0>
Name
CYR1
R/W
Read/write
Description
3-Bit Remote 1 Cycle Value. These three bits define the delay time between making subsequent T MIN
adjustments in the control loop for the Remote 1 channel, in terms of number of monitoring cycles. The
system has associated thermal time constants that need to be found to optimize the response of fans and
the control loop.
Bits
000
Decrease Cycle
8 cycles (1 sec)
Increase Cycle
16 cycles (2 sec)
001
16 cycles (2 sec ) 32 cycles (4 sec)
010
011
32 cycles (4 sec)
64 cycles (8 sec)
64 cycles (8 sec)
128 cycles (16 sec)
100
101
110
111
128 cycles (16 sec) 256 cycles (32 sec)
256 cycles (32 sec) 512 cycles (64 sec)
512 cycles (64 sec) 1024 cycles (128 sec)
1024 cycles (128 sec) 2048 cycles (256 sec)
<5:3>
CYL
Read/write
3-bit local temperature cycle value. These three bits define the delay time between making subsequent T MIN
adjustments in the control loop for the local temperature channel, in terms of number of monitoring cycles.
The system has associated thermal time constants that need to be found to optimize the response of fans
and the control loop.
Bits
000
001
010
011
Decrease Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
Increase Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
100
101
110
111
128 cycles (16 sec) 256 cycles (32 sec)
256 cycles (32 sec) 512 cycles (64 sec)
512 cycles (64 sec) 1024 cycles (128 sec)
1024 cycles (128 sec) 2048 cycles (256 sec)
<7:6>
CYR2
Read/write
2 LSBs of 3-bit Remote 2 cycle value. The MSB of the 3-bit code resides in Dynamic T MIN Control Register 1
(Reg. 0x36). These three bits define the delay time between making subsequent T MIN adjustments in the
control loop for the Remote 2 channel, in terms of number of monitoring cycles. The system has associated
thermal time constants that need to be found to optimize the response of fans and the control loop.
Bits
000
001
010
011
100
101
110
111
Decrease Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
Increase Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
1
Table 25. Maximim PWM Duty Cycle (Power-On Default = 0xFF) 1, 2
Register Address
0x38
0x39
0x3A
R/W 2
Read/write
Read/write
Read/write
Description
Maximum duty cycle for PWM1 output, default = 100% (0xFF).
Maximum duty cycle for PWM2 output, default = 100% (0xFF).
Maximum duty cycle for PWM3 output, default = 100% (0xFF).
1
2
These registers set the maximum PWM duty cycle of the PWM output .
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
Rev. 3 | Page 66 of 81 | www.onsemi.com
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| ADT7470 | 制造商:AD 制造商全称:Analog Devices 功能描述:Temperature Sensor Hub and Fan Controller |
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