参数资料
| 型号： | ADT7468ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 76/81页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADT7468 |
| 标准包装： | 1 |
| 其它名称： | EVAL-ADT7468EB EVAL-ADT7468EB-ND |
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ADT7468
Table 47. Register 0x74—Interrupt Mask Register 1 (Power-On Default <7:0> = 0x00)
Bit
0
1
2
3
4
5
6
7
Name
2.5V
V CCP
V CC
5V
RIT
LT
R2T
OOL
R/W
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Description
2.5 V = 1, masks SMBALERT for out-of-limit conditions on the 2.5 V channel.
V CCP = 1, masks SMBALER T for out-of-limit conditions on the V CCP channel.
V CC = 1, masks SMBALERT for out-of-limit conditions on the V CC channel.
5 V = 1, masks SMBALERT for out-of-limit conditions on the 5 V channel.
RIT = 1, masks SMBALER T for out-of-limit conditions on the Remote 1 temperature channel.
LT = 1, masks SMBALERT for out-of-limit conditions on the local temperature channel.
R2T = 1, masks S MBALERT for out-of-limit conditions on the Remote 2 temperature channel.
OOL = 1, masks SMBALERT for any out-of-limit condition in Status Register 2.
Table 4 8. Register 0x75—Interrupt Mask Register 2 (Power-On Default <7:0> = 0x00)
Bit
Name
R/W
Description
When Pin 21 is configured as a 12 V input, 12V/VC = 1 masks SMBALERT for out-of-limi t conditions
0
12V/VC
Read/write
on the 12 V channel. When Pin 21 is programmed as VID5, this bit masks an SMBALERT, if the VID5
VID code bit changes.
1
2
3
4
5
OVT
FAN1
FAN2
FAN3
F4P
Read only
Read/write
Read/write
Read/write
Read/write
OVT = 1, masks SMBALERT for overtemperature THERM conditions.
FAN1 = 1, masks SMBALERT for a Fan 1 fault.
FAN2 = 1, masks SMBALERT for a Fan 2 fault.
FAN3 = 1, masks SMBALERT for a Fan 3 fault.
If Pin 14 is configured as TACH 4 , F4P = 1 masks SMBALERT for a Fan 4 fault.
If Pin 14 is configured as THERM, F4P = 1 masks SMBALERT for an exceeded THERM timer limit.
If Pin 14 is configured as GPIO, F4P = 1 masks SMBALERT when GPIO is an input and GPIO is
asserted.
6
7
D1
D2
Read/write
Read/write
D1 = 1 masks SMBALERT for a diode open or short on a Remote 1 channel.
D2 = 1 masks SMBALERT for a diode open or short on a Remote 2 channel.
Table 4 9. Register 0x76—Extended Resolution Register 1 1
Bit
<1:0>
<3:2>
<5:4>
<7:6>
Name
2.5V
V CCP
V CC
5V
R/W
Read only
Read only
Read only
Read only
Description
2.5 V LSBs. Holds the 2 LSBs of the 10-bit 2.5 V measurement.
V CCP LSBs. Holds the 2 LSBs of the 10-bit V CCP measurement.
V CC LSBs. Holds the 2 LSBs of the 10-bit V CC measurement.
5 V LSBs. Holds the 2 LSBs of the 10-bit 5 V measurement.
1
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 50. Register 0x77—Extended Resolution Register 2 1
Bit
<1:0>
<3:2>
<5:4>
<7:6>
Name
12V
TDM1
LTMP
TDM2
R/W
Read only
Read only
Read only
Read only
Description
12 V LSBs. Holds the 2 LSBs of the 10-bit 12 V measurement.
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature measurement.
Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature measurement.
1
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Rev. 3 | Page 76 of 81 | www.onsemi.com
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