参数资料
型号: B900M24FXX12IT
元件分类: 数字信号处理
英文描述: 0-BIT, 59.88 MHz, OTHER DSP, PQCC44
文件页数: 96/100页
文件大小: 1547K
代理商: B900M24FXX12IT
Advance Data Sheet
B900
July 1999
Baseband Signal Processor
Lucent Technologies Inc.
95
9 Crystal Oscillator Electrical Requirements and Characteristics (continued)
9.2
Frequency Accuracy Considerations (continued)
For small deviations of a few pF, pullability can be determined by the following equation.
where: CO= parasitic capacitance of crystal
C1 = motional capacitance of crystal (usually around 1 fF—25 fF, value can be obtained from crystal
vendor)
CL = total load capacitance seen by crystal
Note: For a given crystal, making CL as large as possible can reduce pullability and improve frequency stability,
while still maintaining sufficient negative resistance to ensure start-up according to the curves shown in
Figures 25 and 26.
Because the exact values of the parasitic capacitance in a crystal-based oscillator system are unknown, the exter-
nal capacitors are usually selected empirically to null out the frequency offset on a typical prototype board. Thus, if
a crystal is specified to operate with a load capacitance of 15 pF, each external capacitor would have to be slightly
less than 30 pF to account for parasitic capacitance. Suppose, for instance, that a crystal for which CL =15pF is
specified is plugged into the system and it is determined empirically that the best frequency accuracy occurs with
CEXT = 28 pF. This would mean that the equivalent board and device parasitic capacitance from each lead to
ground would be 2 pF.
As an example, suppose it is desired to design a 4.096 MHz, 5.0 V system with ±100 ppm frequency accuracy. The
parameters for a typical high-accuracy, custom, 4.096 MHz fundamental mode crystal are as follows:
Initial Tolerance .......................................... 10 ppm
Temperature Tolerance .............................. 25 ppm
Aging Tolerance ......................................... 6 ppm
Series Resistance...................................... 20
max
Motional Capacitance (C1) ........................ 15 fF max
Parasitic Capacitance (CO) ........................ 7 pF max
To ensure oscillator start-up, the negative resistance of the oscillator with load and parasitic capacitance must be at
least twice the series resistance of the crystal, or 40
. Interpolating from Figure 25 on page 92, external capaci-
tors plus strays can be made as large as 30 pF while still achieving 40
of negative resistance. Assume for this
example that external capacitors are chosen so that the total load capacitance including strays is 30 pF per lead, or
40 pF total. Thus, a load capacitance, CL = 15 pF would be specified to the crystal manufacturer.
From the preceding equation, the pullability would be calculated as follows:
If 2% external capacitors are used, the frequency deviation due to this variation is equal to:
(0.02)(15 pF)(15.5 ppm/pF) = 4.7 ppm
Note: To simplify analysis, CEXT is considered to be 40 pF. In practice, it would be slightly less than this value to
account for strays. Also, temperature and aging tolerance on the capacitors has been neglected.
pullability(ppm/pF)
C1
() 10
6
()
2CO
CL
+
()
2
---------------------------------
=
pullability (ppm/pF)
C1
() 10
6
()
2CO
CL
+
()
2
---------------------------------
0.015
() 10
6
()
27
15
+
()
2
----------------------------------
15.5 ppm/pF
==
=
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