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参数资料
型号： DSP56301VF100
厂商： Freescale Semiconductor
文件页数： 35/124页
文件大小： 0K
描述： IC DSP 24BIT FIXED-POINT 252-BGA
产品变化通告： DSP56301 Discontinuation 12/Nov/2009
标准包装： 60
系列： DSP563xx
类型： 定点
接口： 主机接口，SSI，SCI
时钟速率： 100MHz
非易失内存： ROM（9 kB）
芯片上RAM： 24kB
电压 - 输入/输出： 3.30V
电压 - 核心： 3.30V
工作温度： -40°C ~ 100°C
安装类型： 表面贴装
封装/外壳： 252-BGA
供应商设备封装： 252-MAPBGA（21x21）
包装： 托盘
DSP56301 Technical Data, Rev. 10
1-14
Freescale Semiconductor
Signals/Connections
HSERR
HIRQ
Output, open
drain
Output, open
drain
Tri-stated
Host System Error
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host System Error signal.
Host Interrupt Request
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Interrupt Request signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HSTOP
HWR/HRW
Input/
Output
Input
Tri-stated
Host Stop
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Stop signal.
Host Write/Host Read-Write
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Write/Host Read-Write Schmitt-trigger
signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HIDSEL
HRD/HDS
Input
Host Initialization Device Select
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Initialization Device Select signal.
Host Read/Host Data Strobe
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Read/Host Data Strobe Schmitt-
trigger signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
HFRAME
Input/
Output
Tri-stated
Host Frame
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host cycle Frame signal.
Non-PCI bus
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this signal must be connected to a pull-up resistor or
directly to VCC.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Table 1-11.
Host Interface (Continued)
Signal Name
Type
State During
Reset
Signal Description
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