参数资料
型号: DSP56301VF100
厂商: Freescale Semiconductor
文件页数: 42/124页
文件大小: 0K
描述: IC DSP 24BIT FIXED-POINT 252-BGA
产品变化通告: DSP56301 Discontinuation 12/Nov/2009
标准包装: 60
系列: DSP563xx
类型: 定点
接口: 主机接口,SSI,SCI
时钟速率: 100MHz
非易失内存: ROM(9 kB)
芯片上RAM: 24kB
电压 - 输入/输出: 3.30V
电压 - 核心: 3.30V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 252-BGA
供应商设备封装: 252-MAPBGA(21x21)
包装: 托盘
DSP56301 Technical Data, Rev. 10
1-20
Freescale Semiconductor
Signals/Connections
1.11 Timers
The DSP56301 has three identical and independent timers. Each can use internal or external clocking, interrupt the
DSP56301
after a specified number of events (clocks), or signal an external device after counting a specific number
of internal events.
SCLK
PE2
Input/Output
Input or Output
Input
Serial Clock
Provides the input or output clock used by the transmitter and/or the receiver.
Port E 2
The default configuration following reset is GPIO. For PE2, signal direction is
controlled through the SCI PRR. The signal can be configured as an SCI
signal SCLK through the SCI PCR.
This input is 5 V tolerant.
Table 1-15.
Triple Timer Signals
Signal Name
Type
State During
Reset
Signal Description
TIO0
Input or Output
Input
Timer 0 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO0 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO0 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 0 Control/Status
Register (TCSR0).
This input is 5 V tolerant.
TIO1
Input or Output
Input
Timer 1 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO1 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO1 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 1 Control/Status
Register (TCSR1).
This input is 5 V tolerant.
TIO2
Input or Output
Input
Timer 2 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO2 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO2 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 2 Control/Status
Register (TCSR2).
This input is 5 V tolerant.
Table 1-14.
Serial Communication Interface (SCI) (Continued)
Signal Name
Type
State During
Reset
Signal Description
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