参数资料
型号: DSP56301VF100
厂商: Freescale Semiconductor
文件页数: 41/124页
文件大小: 0K
描述: IC DSP 24BIT FIXED-POINT 252-BGA
产品变化通告: DSP56301 Discontinuation 12/Nov/2009
标准包装: 60
系列: DSP563xx
类型: 定点
接口: 主机接口,SSI,SCI
时钟速率: 100MHz
非易失内存: ROM(9 kB)
芯片上RAM: 24kB
电压 - 输入/输出: 3.30V
电压 - 核心: 3.30V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 252-BGA
供应商设备封装: 252-MAPBGA(21x21)
包装: 托盘
Serial Communication Interface (SCI)
DSP56301 Technical Data, Rev. 10
Freescale Semiconductor
1-19
1.10 Serial Communication Interface (SCI)
The Serial Communication interface (SCI) provides a full duplex port for serial communication with other DSPs,
microprocessors, or peripherals such as modems.
SRD1
PD4
Input/Output
Input or Output
Input
Serial Receive Data
Receives serial data and transfers it to the ESSI receive shift register. SRD1 is
an input when data is being received.
Port D 4
The default configuration following reset is GPIO. For PD4, signal direction is
controlled through PRR1. The signal can be configured as an ESSI signal
SRD1 through PCR1.
This input is 5 V tolerant.
STD1
PD5
Input/Output
Input or Output
Input
Serial Transmit Data
Transmits data from the serial transmit shift register. STD1 is an output when
data is being transmitted.
Port D 5
The default configuration following reset is GPIO. For PD5, signal direction is
controlled through PRR1. The signal can be configured as an ESSI signal
STD1 through PCR1.
This input is 5 V tolerant.
Table 1-14.
Serial Communication Interface (SCI)
Signal Name
Type
State During
Reset
Signal Description
RXD
PE0
Input
Input or Output
Input
Serial Receive Data
Receives byte-oriented serial data and transfers it to the SCI receive shift
register.
Port E 0
The default configuration following reset is GPIO. When configured as PE0,
signal direction is controlled through the SCI Port Directions Register (PRR).
The signal can be configured as an SCI signal RXD through the SCI Port
Control Register (PCR).
This input is 5 V tolerant.
TXD
PE1
Output
Input or Output
Input
Serial Transmit Data
Transmits data from SCI transmit data register.
Port E 1
The default configuration following reset is GPIO. When configured as PE1,
signal direction is controlled through the SCI PRR. The signal can be
configured as an SCI signal TXD through the SCI PCR.
This input is 5 V tolerant.
Table 1-13.
Enhanced Synchronous Serial Interface 1 (ESSI1) (Continued)
Signal Name
Type
State During
Reset
Signal Description
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