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| 型号： | IDT88P8344BHGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA820 |
| 封装： | GREEN, PLASTIC, BGA-820 |
| 文件页数： | 8/98页 |
| 文件大小： | 601K |
| 代理商： | IDT88P8344BHGI |
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8
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006
1. INTRODUCTION
The IDT88P8344 device is a quad SPI-3 to single SPI-4 exchange with
switching capabilities intended for use in VPN firewall cards, Ethernet transport,
and multi-service switches. The SPI-3 and SPI-4 interfaces are defined by the
Optical Internetworking Forum(OIF).
The device can be used as an exchange, a switch, or an aggregation device
between network processor units, multi-gigabit framers and PHYs, and switch
fabric interface devices.
Data Path Overview
Figure 2.
Data Path Diagram
shows an overview of the data path through
the device.
In normal operation, there are two paths through the IDT88P8344 device:
the quad SPI-3 ingress to SPI-4 egress path, and the SPI-4 ingress to quad
SPI-3 egress path. SPI-3 and SPI-4 burst sizes are separately configurable.
In the SPI-3 ingress to SPI-4 egress path, data enter in fragments on the
SPI-3 interface and are received by the SPI-3 interface block. The fragments
are mapped to a SPI-4 address and stored in memory allocated at the SPI-3
level until such a time that the SPI-3 to SPI-4 packet fragment processor
determnes that they are to be transmtted on the SPI-4 interface. The data is
transferred in bursts, in line with the OIF SPI-4 implementation agreement, to
the SPI-4 interface block, and are transmtted on the SPI-4 interface.
In the SPI-4 ingress to SPI-3 egress path, data enter in bursts on the SPI-
4 interface and are received by the SPI-4 interface block. The SPI-4 address
is translated to a SPI-3 address, and the data contained in the bursts are stored
in memory allocated at the SPI-3 level until such a time that the SPI-4 to SPI-
3 packet fragment processor determnes that they are to be transmtted on the
SPI-3 interface. The data is transferred in packet fragments, in line with the OIF
SPI-3 implementation agreement, to the SPI-3 interface block, and are trans-
mtted on the SPI-3 interface.
These and additional data paths are described in more detail in the data path
section of this document.
Figure 2. Data path diagram
SPI-3
SPI-3
SPI-3
SPI-3
SPI-3 ingress to SPI-4 egress
I/F
I/F
I/F
I/F
Memory
Memory
Memory
Memory
I/F
SPI-4
SPI-4 ingress to SPI-3 egress
6370 drw03
Multi-port
Ethernet
Transceiver
Multi-port
Ethernet
Transceiver
SPI-3
SPI-3
IDT88P8344
NPU
Co-Processor
SPI-3
SPI-4
SPI-3
Control
Processor
Memory
Memory
Clear Traffic
Secure Traffic
Additional
Co-Processor
or PHY
PCI
6370 drw02
TYPICAL APPLICATION
Exchange between secure traffic, clear traffic, 10G NPU and co-processor
Figure 1. Typical application: NPU, PHY, and co-processor
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBCG | 功能描述:IC PCI SW 10LANE 4PORT 324BGA RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:PRECISE™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| IDT89H10T4BG2ZBBCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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