- 您现在的位置：买卖IC网 > PDF目录69013 > M37274MA-XXXSP 8-BIT, MROM, MICROCONTROLLER, PDIP52 PDF资料下载
参数资料
| 型号： | M37274MA-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PDIP52 |
| 封装： | 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-52 |
| 文件页数： | 68/131页 |
| 文件大小： | 2049K |
| 代理商： | M37274MA-XXXSP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页当前第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页
41
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274MA-XXXSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
Conditions for Setting Bit 4 of DSC3 to “1”
Data clock of 16 pulses has occured in sub-data slaice line
AND
Clock run-in pulse are detected 4 to 6 times
(10) 16-bit Shift Register
The caption data converted into a digital value by the comparator is
stored into the 16-bit shift register in synchronization with the data
clock. For the main data slice line, the contents of the high-order 8
bits of the stored caption data and the contents of the low-order 8
bits of the same data can be obtained by reading out data register 2
(address 00E516) and data register 1 (address 00E416), respectively.
For the sub-data slice line, the contents of the high-order 8 bits and
the contents of the low-order 8 bits can be obtained by reading out
the data register 4 (address 00ED16) and data register 3 (address
00EC16), respectively. These registers are reset to “0” at a falling of
Vsep. Read out data registers 1 and 2 after the occurence of a data
slicer interrupt (refer to (11) Interrupt Request Generating Circuit).
(11) Interrupt Request Generating Circuit
The interrupt requests as shown in Table 6 are generated by
combination of the following bits; bits 5 and 6 of the clock run-in register
3 (address 020916), bit 1 of the clock run-in register 2 (address
00E716). Read out the contents of data registers 1 to 4 and the
contents of bits 3 to 7 of clock run-in detect registers 1 and 3 after the
occurence of a data slicer interrupt request.
For a data clock, 16 pulses are generated. When just 16 pulses have
been generated, bit 7 of the data slicer control register is set to “1”
(refer to Figure 26). When method 1 is already selected as a start bit
detecting method, this bit becomes a logical product (AND) value
with a clock run-in determination result by setting bit 7 of the start bit
position register to “1.”
When method 2 is already selected as a start bit detecting method
and 16 pulses are generated of a data clock regardless of bit 7 of the
start bit position register, this bit is set to “1.” The contents of this bit
are reset at a falling of the vertical synchronizing signal (Vsep).
Table 5. Setting Conditions for Caption Data Latch Completion Flag
Bit 7 of SP
0
1
Conditions for Setting Bit 7 of DSC1 to “1”
Data clock of 16 pulses has occured in main data slaice line
AND
Clock run-in pulse are detected 4 to 6 times
(9) Data clock generating circuit
This circuit generates a data clock synchronized with the start
bit detected in the start bit detecting circuit.
Set the time from detection of the start bit to occurrence of the data
clock in bits 3 to 7 of clock run-in detect register 2 (address
00E916). The time to be set is represented by the following expression:
Time = (13 + set value) ! reference clock period
Slice line
Main data slice line
Sub-data slice line
b5
0
1
Sources
At end of data slice line
Data clock of 16 pulses has occured
AND
Clock run-in pulse are detected 4 to 6 times
Data clock of 16 pulses has occured
At end of data slice line
Data clock of 16 pulses has occured
AND
Clock run-in pulse are detected 4 to 6 times
Data clock of 16 pulses has occured
b6
0
1
0
1
CR2
b1
0
1
0
1
0
1
0
1
CR3
Table 6. Occurence Sources of Interrupt Request
Occurence Souces of Interrupt Request
相关PDF资料 |
PDF描述 |
|---|---|
| M37373M8-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52 |
| M37409M2-XXXFP | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP56 |
| M37413E6HXXXFP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| M37413M4-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| M37420M4-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M37276MF248SP | 制造商:MITSUBISHI 功能描述:* |
| M37276MF2575P | 制造商:MITSUBISHI 功能描述:* |
| M37276MF260SP | 制造商:MITSUBISHI 功能描述:* |
| M37276MF300SP | 制造商:MITSUBISHI 功能描述:* |
| M37276MF301SP | 制造商:MITSUBISHI 功能描述:* |
发布紧急采购，3分钟左右您将得到回复。