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| 型号： | MT18HTF12872G-40EC2 |
| 元件分类： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.6 ns, DMA240 |
| 封装： | DIMM-240 |
| 文件页数： | 35/36页 |
| 文件大小： | 672K |
| 代理商： | MT18HTF12872G-40EC2 |
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512MB, 1GB, 2GB (x72, REGISTERED)
PC2-3200, PC2-4300, 240-Pin DDR2 SDRAM DIMM
09005aef80e5e626
Micron Technology, Inc., reserves the right to change products or specifications without notice.
HTF18C64_128_256x72G_A.fm - Rev. A 9/03 EN
8
2003 Micron Technology. Inc.
Prior to normal operation, DDR2 SDRAM modules
must be initialized. The following sections provide
detailed information covering device initialization,
register definition, command descriptions, and device
operation.
Initialization
The following sequence is required for power-up
and initialization and is shown in Figure 4. When the
sequence has been completed, the DDR2 SDRAM
device is ready for normal operation.
1. Apply power; if CKE is maintained below 20 per-
cent of VDDQ, outputs remain disabled. To guar-
antee ODT is off, VREF must be valid and a low
level must be applied to the ODT pin (all other
inputs may be undefined). At least one of the fol-
lowing two sets of conditions (A or B) must be
met:
A
.CONDITION SET A
VDD, VDDL and VDDQ are driven from a sin-
gle power converter output
VTT is limited to 0.95V MAX
VREF tracks VDDQ/2.
B
.CONDITION SET B
Apply VDD before or at the same time as
VDDL.
Apply VDDL before or at the same time as
VDDQ.
Apply VDDQ before or at the same time as
VTT and VREF.
2. For a minimum of 200
ms after stable power and
clock (CK, CK#), apply NOP or DESELECT com-
mands and take CKE HIGH.
3. Wait a minimum of 400ns, then issue a PRE-
CHARGE ALL command.
4. Issue an EMR(2) command. (To issue an EMR(2)
command, provide LOW to BA0, and HIGH to
BA1.)
5. Issue an EMR(3) command. (To issue an EMR(3)
command, provide HIGH to BA0 and BA1.)
6. Issue an EMR to enable DLL. (To issue a DLL
ENABLE command, provide LOW to BA1, A0 and
provide HIGH to BA0.)
7. Issue a MODE REGISTER SET command for DLL
RESET. 200 cycles of clock input is required to
lock the DLL. (To issue a DLL RESET command,
provide HIGH to A8 and provide LOW to BA0 and
BA1.)
8. Issue PRECHARGE ALL command.
9. Issue two or more REFRESH commands.
10. Issue a MODE REGISTER SET command with
LOW to A8 to initialize device operation (i.e., to
program operating parameters without resetting
the DLL).
11. At least 200 clocks after step 7, execute EMR OCD
adjust mode if desired. If OCD adjust mode is not
desired, then EMR OCD Default command is
required followed by EMR OCD Exit command.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT18HTF12872JDY-667F1D4 | 制造商:Micron Technology Inc 功能描述:1GB 128MX72 DDR2 SDRAM MODULE COMMERCIAL PBF DIMM 1.8V FULLY - Bulk |
| MT18HTF12872M2DY-667F1B4 | 制造商:Micron Technology Inc 功能描述:1GB 128MX72 DDR2 SDRAM MODULE PBF DIMM 1.8V FULLY BUFFERED - Trays |
| MT18HTF12872M2DY-667F1B5 | 制造商:Micron Technology Inc 功能描述:1GB 128MX72 DDR2 SDRAM MODULE CUSTOM 1.8V FULLY BUFFERED - Trays |
| MT18HTF12872M2Y-53EF1 | 制造商:Micron Technology Inc 功能描述:1GB 128MX72 DDR2 SDRAM MODULE COMMERCIAL CUSTOM 1.8V REGISTE - Bulk |
| MT18HTF12872M3Y-53EF1 | 制造商:Micron Technology Inc 功能描述:1GB 128MX72 DDR2 SDRAM MODULE COMMERCIAL CUSTOM 1.8V REGISTE - Bulk |
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